Virage Logic Drives Down Overall SOC Costs, While Targeting Higher Yielding Designs

Re-configurable Embedded Memory System Offers Flexible Field or Factory Test and Repair Options

Fremont, CA - July  15,  2002, Building upon the first generation of its Self-Test and Repair (STAR) Memory System, which has been adopted by over 30 customers, Virage Logic Corp. (Nasdaq: VIRL), a global leader in embedded memory, today announced its new embedded Re-configurable STAR Memory System. In an effort to shrink the overall cost of manufacturing system-on-chip (SoC) designs, the embedded memory system combines non-volatile embedded memory and memory with redundancy to achieve an increase in yield regardless of memory size or type. The new system also eliminates the need to use expensive laser equipment, thereby lowering the cost of repair.

"We are continually seeing customers integrate large quantities of memory on-chip, and as a result, we are delivering real solutions that address manufacturing yields of SoCs," said Krishna Balachandran, director of product marketing at Virage Logic. "With the new system, we offer solutions that allow our customers to achieve very high repair rates by allowing them to test and repair small, medium, large and ultra-large SRAMs and ROMs under different operating conditions. This not only maximizes the reliability of the SoC, but offers a huge cost savings due to the elimination of any external equipment for test and repair."

Because one of the greatest obstacles to widespread SoC adoption is achieving high manufacturing yields, designers want the flexibility to dynamically correct errors. Because manufacturing defects may not surface immediately upon wafer testing, and pre-programmed test algorithms may not account for faults due to process variations, there is a need for a better way to manage any subsequent memory problems that can materialize after silicon tape-out and over the life of the product. As a result, it is critical that testing of the memories be field-programmable, as well as enabling the flexibility to repair the memory at the factory.

"Differentiated IP for embedded test and repair will result in tremendous strides in memory yield, resulting in more reliable SoCs," said Ed Chen, TSMC's director of design and e-services marketing. "Virage Logic has the added flexibility advantage of both test and repair in the field or in the factory, eliminating the need for any external test and repair equipment."

The company now offers many different versions of the Re-configurable STAR Memory System with each consisting of a STAR Processor, the engine of the system; one or more STAR memories; one or more Area, Speed and Power (ASAP) memories; non-volatile fuses and programmable memory. In order to achieve optimal area, speed, power and yield targets, Virage Logic has integrated its ASAP embedded memories with its embedded memories utilizing redundancy in the same design. As a result, the STAR Processor will now test all the embedded memories on the same chip saving critical design time.

Virage Logic has leveraged its Non-Volatile Electrically Alterable (NOVeA) technology to replace laser programmable fuses in the new memory system. Because NOVeA technology is available in a standard logic process, it can be integrated cost effectively on the same chip. The addition of electrically re-programmable, non-volatile fuses removes the need for any external laser repair equipment. The non-volatile fuses and the programmable memory enable complete flexibility for the designer allowing the test or repair information to be configurable.

The ability to achieve high repair depends on the ability to re-program the repair information when operating problems are uncovered. The re-programmable fuses allow the repair information to be cumulative ensuring a high degree of reliability in the field. Moreover, since each design may have several STAR Memory System groups, a test sequence that determines the order in which the members of a group and different groups will be tested can be programmed in the field using the re-programmable memory. This helps to optimize the total test time.

With built-in redundancy, the SRAM's redundant rows and columns can be activated when a defect occurs enabling the defective location to be redirected to the redundant location making for a true repair. Through its true repair capability, the STAR memories are not susceptible to any memory performance degradation over time, unlike strategies such as Error Checking and Correction (ECC) or bypass. Because these strategies rely on bypassing the defective locations, the leakage current can increase to the point where the memory cannot function reliably and its performance degrades after time.

Availability and Pricing

The Re-configurable STAR Memory System will be available in September 2002 in the 0.18 and 0.13-micron processes at popular foundries with prices starting at $200,000 (U.S. list price).

About Virage Logic

Virage Logic (Nasdaq: VIRL) is a global leader in embedded memory for SoC applications. To meet customer design goals with the highest level of quality, Virage Logic products are silicon proven and production ready, and optimized for area, power and speed. These products include embedded memory cores, as well as software tools and custom memory design services. The company's customers include fabless semiconductor companies who use pure-play foundries and other semiconductor companies. The company has over 200 employees and is located at 46501 Landing Pkwy., Fremont, Calif., 94538. Telephone: (877) 360-6690 (toll free) or (510) 360-8000. Fax: (510) 360-8099. For more information, please visit www.viragelogic.com .

SAFE HARBOR STATEMENT FOR VIRAGE LOGIC UNDER THE PRIVATE SECURITIES LITIGATION REFORM ACT OF 1995:

Statements made in this news release other than statements of historical fact are forward-looking statements, including, for example, statements relating to Virage Logic's business outlook, new products and new relationships. Forward-looking statements are subject to a number of known and unknown risks and uncertainties, which might cause actual results to differ materially from those expressed or implied by such statements. These risks and uncertainties include Virage Logic's ability to maintain and develop new relationships with third-party foundries, adoption of technologies by semiconductor companies and increases in the demand for their products, the company's ability to overcome the challenges associated with establishing licensing relationships with semiconductor companies, the company's ability to obtain royalty revenues from customers in addition to license fees, business and economic conditions generally and in the semiconductor industry in particular, competition in the market for embedded memories and other risks including those described in the Company's Annual Report on Form 10-K for the period ended September 30, 2001, filed with the Securities and Exchange Commission (SEC) on December 19, 2001, and in Virage Logic's other periodic reports filed with the SEC, all of which are available from Virage Logic or from the SEC's website (www.sec.gov), and in press releases and other communications. Virage Logic disclaims any intention or duty to update any forward-looking statements made in this news release.

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