SANTA CLARA, Calif., October 1, 2014 – Tabula Inc., today announced the DesignInsight™ technology, a revolutionary solution for the design verification and debug of high-performance systems. The result of a multi-year research and development project, this new technology is available today, at no charge to customers, as a part of version 3.0 of Tabula’s Stylus® software, supporting the ABAX®² P‑Series of 3D programmable logic devices. This breakthrough technology delivers unprecedented levels of device observability and will have a profound effect on the economics and time to market of next-generation communications systems. Tabula delivers the DesignInsight compiler bundled with pre-compiled views as part of their 100G solutions for high-performance packet processing applications.
As chip design complexity continues to increase, reducing the development time and subsequent costs associated with verification, validation and debug is a pressing industry challenge. Tabula addresses this complex problem with DesignInsight technology by enabling ABAX2 customers unprecedented real-time observability into the inner workings of their design, coupled with a seamless verification methodology spanning from RTL simulation to systems deployed in the field. ABAX2 users can observe signals in a production design operating at full speed (up to 2 GHz) without the need for recompilation or pre-declaration of target signals. Furthermore, there is no need to interrupt the operation of the system in order to change views (collections of signals to be monitored) from one set of signals to another. For Tabula customers, this new technology reduces development costs, accelerates the time to market, increases system uptime/reliability, lowers maintenance costs, and allows for in-depth diagnostics for their end customers.
“With smaller process geometries, the cost of designing chips has skyrocketed, exceeding $90M at 22nm. Verification and validation have become the dominant portion of that cost — as much as 60% — and the dominant contributor to development time,” said Handel Jones, President of IBS. “Tabula’s DesignInsight technology clearly addresses what has become the largest hurdle for leading-edge chip development.”
“Being able to unobtrusively observe a design in the field as if it were running in the lab is a game-changer for our customers,” said Alain Bismuth, Sr. Vice President and CMO of Tabula. “This capability is unprecedented and creates exciting business opportunities for our customers, especially as it relates to increased system uptime/reliability, lower maintenance costs, and the provision of in-depth diagnostics for their end customers”.
More on DesignInsight Technology:
DesignInsight technology consists of three key components, all unique to Tabula:
- Architecture: The Spacetime© 3D programmable architecture, featuring a state element-based interconnect and fine-grained reconfigurability.
- Silicon implementation: The 22nm ABAX2P1 device, boasting a built-in 2 GHz configuration network, configurable trace buffer, on-the-fly signal reconstruction unit, and programmable trigger unit.
- Software: Stylus software, enabling the automated reconstruction of signals optimized away in synthesis.
All components work in concert to deliver unique capabilities, such as:
- Any register declared in user RTL can be observed or used as a trigger.
- Any signal can be observed at full speed – up to 2 GHz.
- No recompilation of the design is required to select signals to observe or to change which signals are observed.
- No interruption of the device operations occurs when changing signals or modifying triggers.
- New assertions written in SystemVerilog can be created and compiled in minutes and applied to the design transparently during normal device operation, even in systems deployed in the field.
- Signals can be viewed as waveforms using industry-standard viewers or downloaded as a spreadsheet in CSV format.
The built-in hardware support for the DesignInsight technology in the ABAX2P1 includes:
- Configurable 1.3 Mb trace buffer
- Reconstruction unit enabling on-the-fly reconstructions of all signals including those optimized away during synthesis
- Programmable 128-bit trigger unit, enabling implementation of functions such as stateful triggering
- USB connectivity
Commands for the DesignInsight compiler are written as a Tcl script or SystemVerilog assertions and compiled into views, which are then loaded in to the device while it is running. As a result, for the first time, designers can extend their use of assertions into hardware, whether in the lab or the field, providing a common design verification and debug methodology throughout the product life cycle.
DesignInsight technology is available immediately at no charge, as part of the Stylus 3.0 release and with any of Tabula’s development boards. In addition, pre-compiled DesignInsight views are delivered with all of Tabula’s 100G pre-engineered solutions, providing users with examples of how this breakthrough technology can provide visibility into key elements of these solutions.
Tabula is the industry’s most innovative programmable logic solutions provider, delivering breakthrough capabilities for today’s most challenging systems applications. The company's ABAX2 family of general-purpose 3D programmable logic devices (3PLDs), based on Tabula’s patented Spacetime architecture and supported by its Stylus compiler, sets a new benchmark for the capability of programmable devices at volume price points, enabling re-programmability not only in FPGA applications but also in those historically served only by ASICs or ASSPs. Headquartered in Santa Clara, California, Tabula has over 130 employees and has assembled a leadership team consisting of industry veterans and successful entrepreneurs. Tabula is backed by top-tier investors with a long-term view toward enduring market leadership. For more information, please visit the Tabula website at www.tabula.com