New Workflow Automates the Integration of Hardware and C Code into Altera SoCs
San Jose, Calif., November 5, 2014 – Altera Corporation (Nasdaq: ALTR) today announced new programming support for its ARM-based SoCs using industry-standard workflows from MathWorks. Release 2014b from MathWorks includes an automated, highly integrated model-based design workflow optimized for Altera SoCs. Designers using this flow can accelerate their algorithmic designs in Altera SoCs while staying in a high-level programming environment and save weeks of development time.
“Today’s announcement is a significant extension to our partnership with Altera, enabling our customers to quickly and easily leverage the performance and system-level benefits that Altera SoCs provide,” said Ken Karnofsky, senior strategist for signal processing applications at MathWorks. “Engineers now have a highly-automated SoC workflow for modeling algorithms in MATLAB and Simulink, simulating with system test benches, partitioning into hardware and software subsystems, generating C and HDL code, and prototyping with Altera design tools and development kits.”
The highly integrated hardware/software workflow allows programmers to simulate, prototype, verify and implement algorithms that target both the FPGA and ARM processors integrated in Altera SoC FPGAs. The design flow automatically generates the interfaces between the FPGA, the integrated processor system and the software drivers. Targeted support for Altera SoCs is included in two MathWorks code generation products, the HDL Coder™ and Embedded Coder® tools. Using a single development environment, engineers use HDL Coder to generate custom IP cores and configure the programmable logic portion of the SoC, while Embedded Coder is used to generate C/C++ code that runs on the ARM-based hard processor system.
A model-based design environment targeting Altera SoCs accelerates the design process by allowing designers to stay in a familiar design environment without requiring designers to be experienced hardware engineers. Designers leveraging Altera SoCs can accelerate their algorithms in the FPGA portion of the device while running the rest of their design in the ARM processors. Release 2014b includes automated support for Altera’s low-cost Cyclone® V SoCs, including automatic programming of Cyclone V SoC development boards.
“We are very excited about this new level of design support provided by MathWorks for our SoCs,” said Joerg Bertholdt, director of embedded software marketing at Altera. “Our SoCs are built on a solid foundation that is based on a superior architecture, industry-standard development tools and broad operating system support. The addition of a MathWorks-offered model-based design flow to our SoC ecosystem makes it much easier for designers to adopt and benefit from the performance and power savings this class of device offers.”
This model-based design workflow support for Altera SoCs is available now from MathWorks in its R2014b software release. For more information, or to download, visit www.mathworks.com/alterasoc. The Embedded Coder Support Package and the HDL Coder Support Package for Altera SoCs support both Altera’s Cyclone V SoC Development Kit and Arrow’s SoCkit Development Kit.
Altera® programmable solutions enable designers of electronic systems to rapidly and cost effectively innovate, differentiate and win in their markets. Altera offers FPGAs, SoCs, CPLDs, and complementary technologies, such as power management, to provide high-value solutions to customers worldwide. Visit Altera at www.altera.com.