Xilinx Announces Industry's First Low Latency 25G Ethernet IP for FPGAs to Address Throughput Challenges in Data Center Applications
Company demonstrates new 25G Ethernet MAC and PCS LogiCORE IP at Supercomputing 2014
SAN JOSE, Calif. -- Nov. 12, 2014 -- Xilinx, Inc. (NASDAQ: XLNX) today announced the industry's first low latency 25G Ethernet IP for FPGAs to address throughput challenges in data center applications. The low latency 25G Ethernet MAC and PCS LogiCORE™ IP solution helps to reduce data center CapEx by providing a migration path from 10G to 25G links and delivers a drastic increase in performance by more than doubling the front panel bandwidth between top of rack switches and servers (10G to 25G). This unique industry offering also supports the new 25G Ethernet Consortium specification and will be aligned with the industry's continuing advancements in next-generation processors, which are doubling their performance for tomorrow's data center servers. Xilinx is demonstrating the 25G Ethernet MAC and PCS LogiCORE IP solution at Supercomputing, November 17-20, 2014, Booth #3903 and #4006, Ernest N. Morial Convention Center, New Orleans, Louisiana. The live demonstration utilizes two Virtex® UltraScale™ VCU107 boards communicating over four channels of 25G Ethernet through 5 meters of direct attached copper cable and two QSFP+ modules.
Availability
The 25G Ethernet MAC and PCS LogiCORE IP solution is available for early access customers. For more information, please contact your local sales representative or visit http://www.xilinx.com/esp/datacenter/data_center_ip.htm
About Xilinx
Xilinx is the world's leading provider of All Programmable FPGAs, SoCs, and 3D ICs. These industry-leading devices are coupled with a next-generation design environment and IP to serve a broad range of customer needs, from programmable logic to programmable systems integration. For more information, visit www.xilinx.com.
|
Xilinx, Inc. Hot IP
Related News
- Chevin Technology releases 25G Ultra Low Latency MAC/PCS for Xilinx Virtex UltraScale FPGAs
- Alpha Data has partnered with Chevin Technology to support low latency 10G Ethernet and UDP offload IP on the ADM-PCIE-KU3 Accelerator board with Xilinx Kintex Ultrascale FPGA
- Xilinx Delivers the Industry's Most Flexible and Comprehensive Ethernet Portfolio for Data Center Interconnect, Service Provider and Enterprise Applications
- Intilop releases a Full TCP & UDP Host-Side Application interface for Altera and Xilinx FPGAs for Software's use that is implemented in Low latency hardware
- Synopsys Launches Industry's First Complete 1.6T Ethernet IP Solution to Meet High Bandwidth Needs of AI and Hyperscale Data Center Chips
Breaking News
- Ceva Neural Processing Unit IP for Edge AI Selected by Nextchip for Next-Generation ADAS Solutions
- Cadence Advances AI in the Cloud with Industry-First DDR5 12.8Gbps MRDIMM Gen2 Memory IP System Solution
- Thalia joins GlobalFoundries' GlobalSolutions Ecosystem to advance IP reuse and design migration
- MosChip® to showcase Silicon Engineering Services at TSMC 2025 North America Technology Symposium
- Alphawave Semi Audited Results for the Year Ended 31 December 2024
Most Popular
- New Breakthroughs in China's RISC-V Chip Industry
- Cadence to Acquire Arm Artisan Foundation IP Business
- Analog Bits to Demonstrate IP Portfolio on TSMC 3nm and 2nm Processes at TSMC 2025 Technology Symposium
- JEDEC® and Industry Leaders Collaborate to Release JESD270-4 HBM4 Standard: Advancing Bandwidth, Efficiency, and Capacity for AI and HPC
- Shifting Sands in Silicon by Global Supply Chains
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |