Lantern Communications Delivers Carrier Class Ethernet Services Using Xilinx Virtex-II Platform FPGAs
SAN JOSE, Calif., July 23, 2002 - Xilinx, Inc. (NASDAQ:XLNX), announced today that Lantern Communications, a leading developer of network architecture for operators of metropolitan area networks (MAN), has selected Xilinx Virtex-II FPGAs in its latest Metro Packet Switch (MPS) product line. Lantern Communications utilizes Virtex-II FPGAs for packet formatting, packet processing, and bus interfacing between two different protocols in the MPS system. Lantern is among a growing number of next-generation networking companies to use Xilinx FPGAs to gain a competitive advantage in metro area networking (MAN) applications.
"Xilinx is the clearly the technology leader when it comes to high-density logic solutions that offer superior features, such as specialized serial I/Os, which are required to stay competitive in the metro area networking market," said Nader Vijeh, chief technology officer at Lantern Communications. "Xilinx Virtex-II FPGAs provided the reprogrammable platform we needed to deliver reliable and scalable packet-based services in metro area networks."
"Lantern's application of our Virtex-II FPGAs is another illustration of the need for a flexible high performance platform in order to be competitive in the MAN market, where technology standards are still in flux," said Robert Bielby, senior director of Strategic Solutions Marketing at Xilinx. "By employing the Virtex-II Platform FPGA, Lantern Communications is able to accelerate the delivery of carrier class Ethernet services for the metro area network market."
About the Lantern MPS
Lantern's MPS system incorporates advanced bandwidth management and QoS techniques to enable the delivery of deterministic services over an all-packet edge infrastructure. The ability to deliver guaranteed quality of service is essential in enabling network convergence. By deploying an architecture that offers assured QoS services, carriers can offer an array of services on one converged network.
About Xilinx Virtex-II Platform FPGAs
The Virtex-II family, ranging from 40,000 up to eight million system gates, delivers the highest performance, highest density, and largest block RAM of any programmable solution available. It includes advanced system features such as digital clock management (DCM), high speed embedded 18X18 multipliers for XtremeDSP performance, and XCITE technology for improved signal integrity.
About the Metro-Optical Networking Forum
On July 25, 2002 in Santa Clara, Calif., Xilinx, along with other industry leaders, will host a free one-day event to address the challenges of designing and developing products for the metro area and edge access networks. Attendees will hear from industry leaders and visionaries on where this dynamic market is headed and the technologies driving success in the MAN space. Location and agenda information can be found at www.xilinx.com/metro .
About Lantern Communications
Lantern Communications is pioneering the application of Resilient Packet Ring (RPR) technology in carrier-class packet transport systems for metropolitan area networks. Lantern Communications is actively participating in the IEEE 802.17 RPR Working Group (www.ieee802.org/17) responsible for developing standards for RPR systems. In addition, Lantern is a founding member of the RPR Alliance (www.rpralliance.org), an independent industry organization of 17 vendors whose charter is to promote and articulate the benefits of RPR solutions. Other well-known members include Cisco (CSCO - NASDAQ), Nortel (NT - NYSE) and Riverstone (RSTN - NASDAQ). Founded in early 1999, Lantern has more than 150 employees, with development facilities in San Jose, Calif., and Ottawa, Canada. For more information visit www.lanterncommunications.com .
About Xilinx
Xilinx, Inc. (NASDAQ: XLNX) is the worldwide leader of programmable logic solutions. Additional information about Xilinx is available at www.xilinx.com .
|
Xilinx, Inc. Hot IP
Related News
- Xilinx and Alcatel Broaden Ethernet Connectivity Solutions for Virtex-II Platform FPGAs
- Spirent Communications Selects Xilinx Virtex-II Platform FPGAs for 40G Optical Transport Analyzer
- Xilinx Completes Successful UNH Interoperability Testing For Ethernet Solutions Suite With Virtex-II Series FPGAs
- Xilinx Announces Free Configurable PCS Reference Design For Use With Virtex-II Pro Platform FPGAs
- Xilinx Delivers Virtex-II Pro X FPGAs - World's Most Capable High-Speed Serial Transceiver Solution
Breaking News
- Arteris Joins Intel Foundry Accelerator Ecosystem Alliance Program to Support Advanced Semiconductor Designs
- SkyeChip Joins Intel Foundry Accelerator IP Alliance
- Siemens and Intel Foundry advance their collaboration to enable cutting-edge integrated circuits and advanced packaging solutions for 2D and 3D IC
- Cadence Expands Design IP Portfolio Optimized for Intel 18A and Intel 18A-P Technologies, Advancing AI, HPC and Mobility Applications
- Synopsys and Intel Foundry Propel Angstrom-Scale Chip Designs on Intel 18A and Intel 18A-P Technologies
Most Popular
- QuickLogic Delivers eFPGA Hard IP for Intel 18A Based Test Chip
- Siemens collaborates with TSMC to drive further innovation in semiconductor design and integration
- Aion Silicon Joins Intel Foundry Accelerator Design Services Alliance to Deliver Next-Generation Custom SoCs at Scale
- TSMC Unveils Next-Generation A14 Process at North America Technology Symposium
- BOS Semiconductors to Partner with Intel to Accelerate Automotive AI Innovation
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |