Latest Xtensa processor innovation platform delivers significant architectural enhancements
SAN JOSE, Calif., Jan. 12, 2015 -- Cadence Design Systems, Inc. today announced the 11th generation of the Tensilica® Xtensa® processors. The new Xtensa LX6 and Xtensa 11 processors enable users to create innovative custom processor instruction sets with up to 25 percent less processor logic power consumption and up to 75 percent better local memory area and power efficiency.
The latest versions of the Cadence® Xtensa customizable processors are available now. For more information, visit http://www.cadence.com/news/xtensa.
The new Xtensa 11 and Xtensa LX6 processors feature several architectural improvements, including:
- Enhancements in flexible length instruction extensions (FLIX) for Xtensa LX6 that allow for very long instruction word (VLIW) instructions of any length from 4 to 16 bytes, resulting in code size savings of up to 25 percent compared to prior Xtensa versions, thus enabling local memory and cache size reductions of up to 25 percent for the same performance level.
- An option for run-time power-down of portions of cache memories, yielding up to 75 percent local memory power savings in select operating scenarios with dynamic cache-way control.
- More efficient data cache block prefetch lowers system power and boosts system performance by speeding functions such as MemCpy by 6.5 times faster and reducing the total number of system bus read operations by up to 23 percent.
- Reduced dynamic switching power of the processor logic gates by up to 25 percent.
"These latest improvements put the Tensilica processors even further ahead of all other processor cores on the market that claim to offer configurability," said Jack Guedj, corporate vice president of Tensilica products at Cadence. "Only Cadence automates the creation of both hardware and software development tools, allowing customers to create fully optimized processors for many applications in record time and with state-of-the-art software development tools."
The Xtensa processor generator technology from Cadence blends the best of conventional fixed-architecture processor solutions with the innovation potential of Application Specific Instruction-set Processor (ASIP) tools. Every Xtensa processor includes the common core Xtensa instruction set architecture (ISA) that delivers modern, high-performance RISC processor benefits.Shipping at a rate of over 2 billion cores per year, Xtensa is the #2 volume processor in the market.
Building on top of this leading-edge control CPU capability, Cadence also delivers dozens of complex DSP options for the Xtensa platform – including the market-leading HiFi Audio DSP family and ultra-high-performance imaging and communications DSPs. Licensees of the Xtensa platform can mix and match their choice of preconfigured ISA options, but also have the freedom to innovate new & proprietary instruction set extensions with complete architectural freedom. Unlike other ASIP tools that lack a common core ISA, innovative cores built upon the Xtensa platform leverage the entire ecosystem of tools and partners supporting the 225 other licensees. With today's leading-edge SoCs containing dozens of programmable cores, the Xtensa platform empowers innovators to deploy many different optimized cores in the same SoC which are all built on one common architecture and toolset.
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at http://www.cadence.com.