Dual Port Register File Compiler (1 Read-Only Port, 1 Write-Only Port)
Truechip announces first customer shipment of PCI Express Gen3 Comprehensive Verification IP (CVIP)
January 20, 2015 - Truechip Solutions, the verification IP specialist, announced that it has shipped early adopter version of its PCI Express Gen3 Comprehensive Verification IP (CVIP) to its partners in the early adoption program.
This CVIP is natively developed in SystemVerilog (UVM) and is architected such that a single VIP is able to provide comprehensive, seamless Block, SoC and System Level Verification across dynamic simulation, assertion based dynamic and formal verification, as well as support for hardware acceleration and emulation. The CVIP is compatible with all industry leading simulators and hardware platforms.
Nitin Kishore, CEO of Truechip, said in a statement, "The PCI Express Gen3 CVIP is our second major product release of 2015, and it clearly demonstrates our commitment to significantly enhance our product portfolio this year. This CVIP release will help us grow our market segment share at existing customers, as well as help drive growth.”
To try out any of Truechip's high quality VIPs or experience industry's first 24X5 support, please visit www.truechip.net.
Truechip is also a member of MIPI Alliance. MIPI Allianjce is a global, collaborative organization comprised of companies that span the mobile ecosystem and are committed to defining and promoting interface specifications for mobile devices.
|
Search Verification IP
Truechip Solutions Hot Verification IP
Related News
- Truechip announces first customer shipment of NVM Express Comprehensive Verification IP (CVIP)
- Truechip announces first customer shipment of JESD204B Comprehensive Verification IP (CVIP)
- Truechip announces first customer shipment of 25G/ 50G Ethernet Comprehensive Verification IP (CVIP)
- Truechip announces first customer shipment of CPRI Comprehensive Verification IP (CVIP)
- Truechip announces first customer shipment of PCIe Gen4 Comprehensive Verification IP (CVIP)
Breaking News
- Arteris Joins Intel Foundry Accelerator Ecosystem Alliance Program to Support Advanced Semiconductor Designs
- SkyeChip Joins Intel Foundry Accelerator IP Alliance
- Siemens and Intel Foundry advance their collaboration to enable cutting-edge integrated circuits and advanced packaging solutions for 2D and 3D IC
- Cadence Expands Design IP Portfolio Optimized for Intel 18A and Intel 18A-P Technologies, Advancing AI, HPC and Mobility Applications
- Synopsys and Intel Foundry Propel Angstrom-Scale Chip Designs on Intel 18A and Intel 18A-P Technologies
Most Popular
- QuickLogic Delivers eFPGA Hard IP for Intel 18A Based Test Chip
- Siemens collaborates with TSMC to drive further innovation in semiconductor design and integration
- Aion Silicon Joins Intel Foundry Accelerator Design Services Alliance to Deliver Next-Generation Custom SoCs at Scale
- TSMC Unveils Next-Generation A14 Process at North America Technology Symposium
- BOS Semiconductors to Partner with Intel to Accelerate Automotive AI Innovation
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |