Grenoble, France – February 16, 2015 -- With the growth of ultra-low power applications for the Internet of Things, users at TSMC 55 nm uLP could count on Dolphin Integration to bring a complete offering.
The foundry sponsored panoply at TSMC 55 nm uLP includes: single port RAM, one port register file, two port register file, dual port RAM, ROM, 6-track and 9-track standard cell libraries with Island Construction Kit (ICK).
But a low-power SoC needs the complete platter of a “low power panoply” (LoPan) with extrremly low voltage (eLV) standard cell library SESAME HD-eLV for always on blocks, ultra high density standard cell library SESAME uHD with island construction kit SESAME CLICK for other power domains and low power Dual Output Regulator DOR-eSR-qLR enabling dynamic mode switching of power islands.
At TSMC 55 nm uLP, two different packages LOPAN-eLV and LOPAN-DOR guarantee you to find the solution closest to your needs with or without power regulators:
Key benefits of LOPAN offering:
- Extra low power consumption in your always on block thanks to SESAME HD-eLV enabling functionality at the minimum data retention voltage of uHD (0.5 V min) for lowering both dynamic and leakage power
- SESAME uHD (pulsed latches) reducing for most logic blocks power by while saving
- Safe and easy minimization of the flow with “FAIRY” (innovative alternative to daisy chaining) thanks to Dolphin Integration island construction kit SESAME CLICK
- SpRAM RHEA designed with partitioned array to reach ultra low power consumption at 1.2 V +/-10% and 0.9 V +/-10%
- The Reusable Power Kit Library (RPKL) for building voltage regulators to ensure the lowest power consumption of SoCs allowing mode switchings
For more information on the panoply at TSMC 55 nm uLP, click here or contact firstname.lastname@example.org
About Dolphin Integration
Dolphin Integration contributes to "enabling mixed signal Systems-on-Chip" for worldwide customers - up to the major actors of the semiconductor industry - with Silicon IP components best at low-power consumption.
This wide offering is based on innovative libraries of standard cells, register files, memory generators and power regulators. Complete networks for power supply can be flexibly assembled together with their loads: from high-resolution converters for audio and measurement applications to power-optimized micro-controllers of 8 or 16 and 32 bits.
Over 30 years of diverse experiences in the integration of silicon IP components and providing services for ASIC/SoC design and fabrication, with its own EDA solutions solving unaddressed challenges, make Dolphin Integration a genuine one-stop shop covering all customers’ needs for specific requests.
The company striving to incessantly innovate for its customers’ success has led to two strong differentiators:
- state-of-the-art “configured subsystems” for high-performance applications securing the most competitive SoC architectural solutions,
- a team of Central and Field Application Engineers supporting each user’s need for optimal application schematics, demonstrated through EDA solutions enabling early performance assessments
Its social responsibility has been from the start focused on the design of integrated circuits with low-power consumption, placing the company in the best position to now contribute to new applications for general power savings through the emergence of the Internet of Things.