Researchers Claim 44x Power Cuts
New on/off transceivers reduce power 80%
R. Colin Johnson, EETimes
3/30/2015 00:01 AM EDT
PORTLAND, Ore.-- Researchers sponsored by the Semiconductor Research Corp. (SRC, Research Triangle Park, N.C.) claim they have extended Moore's Law by finding a way to cut serial link power by as much as 80 percent. The innovation at the University of Illinois (Urbana) is a new on/off transceiver to be used on chips, between chips, between boards and between servers at data centers.
The team estimates the technique can reduce power up to whopping 44 times for communications, extending Moore's Law by increasing computational capacity without increasing power. "While this technique isn’t designed to push processors to go faster, it does, in the context of a datacenter, allow for power saved in the link budget to be used elsewhere," David Yeh, SRC director of Integrated Circuits and Systems Sciences told EETimes.
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |
Related News
- Lattice sensAI 3.0 Solutions Stack Doubles Performance, Cuts Power Consumption in Half for Edge AI Applications
- Synopsys' New USB 2.0 Type-C IP Cuts Power and Area for IoT Edge Applications
- Synopsys' New DesignWare MIPI D-PHY Cuts Area and Power by 50 Percent
- Cadence Tensilica HiFi Audio Tunneling for Android Cuts Audio Processing Power by Up to 14X
- Synopsys New Ultra Low-Power Non-Volatile Memory IP Cuts Power by 90 Percent and Size in Half
Breaking News
- Arteris Joins Intel Foundry Accelerator Ecosystem Alliance Program to Support Advanced Semiconductor Designs
- SkyeChip Joins Intel Foundry Accelerator IP Alliance
- Siemens and Intel Foundry advance their collaboration to enable cutting-edge integrated circuits and advanced packaging solutions for 2D and 3D IC
- Cadence Expands Design IP Portfolio Optimized for Intel 18A and Intel 18A-P Technologies, Advancing AI, HPC and Mobility Applications
- Synopsys and Intel Foundry Propel Angstrom-Scale Chip Designs on Intel 18A and Intel 18A-P Technologies
Most Popular
- QuickLogic Delivers eFPGA Hard IP for Intel 18A Based Test Chip
- Siemens collaborates with TSMC to drive further innovation in semiconductor design and integration
- Aion Silicon Joins Intel Foundry Accelerator Design Services Alliance to Deliver Next-Generation Custom SoCs at Scale
- TSMC Unveils Next-Generation A14 Process at North America Technology Symposium
- BOS Semiconductors to Partner with Intel to Accelerate Automotive AI Innovation