Grenoble, France – April 6, 2015 -- The growing popularity of smartphone and DTV applications with 4K displays translates into demand for a new generation of portable displays featuring high resolution and excellent power performance.
The TSMC 55nm HV process provides an efficient infrastructure to design cost-effective and low-power display drivers. Based on this technology, Dolphin Integration continues to strengthen its leading position by providing a new SRAM architecture specially designed to meet the requirements of the steadily expanding display driver market for high-resolution mobile handsets.
The SpRAM LYRA is designed for high density (through specific bitcell and architecture) with no compromise on speed and stand-by power consumption, thanks to several Vt selections to achieve the best speed versus leakage trade-off. In addition, LYRA provides flexibility for the easiest SoC integration:
Use of only 3 metal layers to ease power routing over the RAM,
Wide range of internal configurations (mux and bank) to allow specific form factors compliant with IC Driver position with respect to the screen.
The SpRAM LYRA enriches the sponsored memory offering at TSMC 55nm HV as:
SpRAM RHEA: high-density and low-power single port RAM using 4 metal layers
Via ROM TITAN: thanks to its patented bit cell, the ROM TITAN increases density up to 10 % versus alternative solutions at 55 nm
2PRFile ERA: high-density and low-power two port register files
In complement to this offering:
Note that Dolphin Integration's expertise has been prized by a TSMC Award (2014) for Specialty IPs due to its ability to address efficiently "More Than Moore" technologies. This acknowledged experience, 30 years, results from continuously renewed innovation at Dolphin Integration.
For more information on our catalog at TSMC 55 nm HV, contact email@example.com
About Dolphin Integration
Dolphin Integration contributes to "enabling mixed signal Systems-on-Chip" for worldwide customers - up to the major actors of the semiconductor industry - with Silicon IP components best at low-power consumption.
This wide offering is based on innovative libraries of standard cells, register files, memory generators and power regulators. Complete networks for power supply can be flexibly assembled together with their loads: from high-resolution converters for audio and measurement applications to power-optimized micro-controllers of 8 or 16 and 32 bits.
Over 30 years of diverse experiences in the integration of silicon IP components and providing services for ASIC/SoC design and fabrication, with its own EDA solutions solving unaddressed challenges, make Dolphin Integration a genuine one-stop shop covering all customers’ needs for specific requests.
The company striving to incessantly innovate for its customers’ success has led to two strong differentiators:
- state-of-the-art “configured subsystems” for high-performance applications securing the most competitive SoC architectural solutions,
- a team of Integration and Application Engineers supporting each user’s need for optimal application schematics, demonstrated through EDA solutions enabling early performance assessments
Its social responsibility has been from the start focused on the design of integrated circuits with low-power consumption, placing the company in the best position to now contribute to new applications for general power savings through the emergence of the Internet of Things.