Arteris Delivers FlexNoC Version 3 to Enhance System-on-Chip (SoC) IP Assembly

New version improves SoC designer productivity, provides foundation for future technologies

CAMPBELL, California, Apr. 08, 2015 – 

Arteris Inc., the inventor and only supplier of silicon-proven commercial network-on-chip (NoC) interconnect IP solutions, today announced availability of FlexNoC Version 3 (v3) interconnect fabric IP designed to help chip designers create more sophisticated chips, more quickly.

Version 3 of Arteris FlexNoC enables designers to avoid the economic penalties for being late to market by addressing SoC complexity, which has exploded with the growth of mobile phone, consumer and automotive electronics.

FlexNoC Version 3 incorporates the following features to increase SoC designer productivity:

• Switch-based topology editor – It is now easier to create, characterize and modify large designs while keeping access to the entire SoC topology available within a single view.
• Topic- and activity-based user interface – Years of customer feedback and human factors research have resulted in a streamlined interface that makes it easier for SoC architects and designers to perform complex and repetitive tasks.
• NoC composition enhancements – Users can more easily break large interconnect designs into smaller modules for implementation by different sub-teams, and can quickly combine separate designs or modules into a single interconnect instance for integration.

Additionally, FlexNoC v3 provides a foundational platform for future IP technology development.

"Arteris FlexNoC Version 3 allows our customer’s SoC design capacity to scale in line with their SoC complexity and schedules," said K. Charles Janac, President and CEO of Arteris. "This major technological advance provides not only an improved framework for SoC creation and assembly, but also a technology foundation from which revolutionary new capabilities are being built."

Arteris FlexNoC is the industry-standard SoC interconnect fabric IP, powering the on-chip communications within the world’s most sophisticated SoCs created by Samsung, Renesas, HiSilicon, Altera, Mobileye and many others.

Availability
Arteris FlexNoC Version 3 is available today, and as an upgrade to existing versions of Arteris FlexNoC interconnect IP.

About Arteris Inc

Arteris provides Network on Chip (NoC) interconnect IP to improve performance, power consumption and die size of system on chip (SoC) devices for consumer electronics, mobile, automotive and other applications.

Using Arteris solves pain for our customers. Traditional bus and crossbar interconnect approaches create serious problems for architects, digital and physical designers, and integrators: Massive numbers of wires, increased heat and power consumption, failed timing closure, spaghetti-like routing congestion leading to increased die area, and difficulty making changes for derivatives.

Whether you are using AXI, OCP, AHB or a proprietary protocol, Arteris Network on Chip (NoC) IP reduces the number of wires by nearly one half, resulting in fewer gates and a more compact chip floor plan. Having the option to configure each connection s width, and each transaction s dynamic priority, assures meeting latency and bandwidth requirements. And with the Arteris IP configuration tool suite, design and verification can be done easily, in a matter of days or even hours.

Arteris invented Network on Chip technology, offering the world s first commercial solution in 2006. Arteris connects the IP blocks in semiconductors from Qualcomm, Samsung, TI, and others, representing over 50 System on Chip devices. Find out more about Arteris products.