Aims Technology releases Industry’s First Non-legacy AMBA5 CHI based High-performance Cache Coherent Network-on-Chip (NoC) IP for SoCs

Accelerates the deployment and proliferation of cache-coherent SoCs into emerging high performance and low power markets

Santa Clara, CA, April 16, 2015 - Aims Technology Inc., a cache-coherent network-on-chip IP company, based in Santa Clara, CA, announced the release of its AimsConnect™ AMBA® 5 CHI (Coherent Hub Interface) protocol compliant Cache-coherent Network-on-chip (NoC) IP to enable next generation multiprocessor SoC market. The company has a licensing agreement with ARM for using AMBA 5 CHI protocol in its products. The product is a highly scalable and configurable enterprise class NOC IP, micro-architected to meet the pent-up demand for performance in data center, security, networking, and High-Performance Computing (HPC) market. The directory-based, heterogeneous architecture allows large number of coherent nodes, coherent-aware nodes, and non-coherent IO and memory to communicate with one another under a single network.

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With the growing demand of today’s applications to integrate higher number of processing nodes inside a SoC, the industry requires an on-chip network that is coherent, scalable, and structurally aware. With process technologies, 28nm and below, wire delay plays a significant role and becomes a prohibitive factor in scaling up of the number of processing nodes. AimsConnect™ NoC IP solves these industry problems by providing an on-chip interconnect IP solution that is ground-up with no legacy overhead and scalable across high number of processor, I/O, and memory nodes that can be configured for multiple topologies without increasing the structural complexity. The product is optimized for energy-efficiency, very high MIPS count with minimum latency to work with ARM® Cortex®-A72, Cortex-A57 and Cortex-A53 processors.

“Aims Technology’s sole focus, since inception, has been to bring top quality, highest-performance cache-coherent on-chip interconnect IP to the market. The devil is in the details. One size does not fit all. The product has been very carefully micro-architected with multiple patents pending that dramatically improves performance and cuts down latency. The industry required an AMBA 5 CHI based Network-on-chip solution for high performance and low power market,” said Kishore Mishra, President and CTO. “We applied our decades of high speed interface design, switching, storage, networking, and ARM processor experience to design the best-in-class on-chip interconnect IP for today’s and next-generation market.”

“The emerging NoC market requires collaboration among companies with complementary expertise to provide the best-in-class solution to customers. With the release of cache coherent on-chip interconnect IP, an enterprise class product from Aims Technology, we expect to take our successful relationship to the next level,” says Chris Browy, co-founder and vice-president of marketing, Avery Design. “Such cohesive relationship minimizes the risk of first pass silicon success to our mutual customers.”

About Aims Technology Inc.

Aims Technology Inc. designs and licenses next generation cache-coherent network-on-chip (NoC) IP for high performance and low power SoC markets that includes but not limited to computing, security, storage, and networking. The company products are optimized for energy-efficiency and very high MIPS count with minimum latency to work with ARM® Cortex®-A72, Cortex-A57 and Cortex-A53 processors. The company has offices in Santa Clara, CA, USA and Bhubaneswar, India. For details, visit www.aimstechnologyinc.com

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