Renesas Demonstrates Deterministic Deep Database Search Engine Interoperating with Xilinx’s FPGA-Based Packet Processor at Japan IT Week 2015
Renesas S-Series Search Engine Together with Xilinx’s SDNet-Generated Packet Processing Architectures Enables Complete System Solutions for IoT Network Infrastructures
SANTA CLARA, Calif. -- April 27, 2015 --Renesas Electronics Corporation (TSE:6723), a premier provider of advanced semiconductor solutions, today announced it is demonstrating its Deterministic Deep Database Search Engine interoperating with Xilinx’s FPGA-based packet processor at Japan Week 2015. Developed in close collaboration with Xilinx, this solution supports up to 200 Gbps of packet processing and includes advanced classification capabilities with over one million rules for application identification and access control lists to address the explosion of traffic and data generated by the Internet of Things (IoT) sensors and devices.
“The new platform will combine the benefits of our network search engine with Xilinx’s flexible SDNet®-based packet processor and reference designs to provide customers with an easy-to-implement, customizable solution for IoT network infrastructure that allows them to accelerate their time to market,” said Ichiro Tomioka, Vice President, Chief of OA & ICT Business Division, Renesas Electronics Corporation.
The Renesas S-series network search engine (R8A20686BG/R8A20646BG) provides two high-speed Interlaken Look-Aside ports and two independent memory banks enabling multi-threaded configurations. Based on over ten years of Renesas’ extensive experience in ternary content addressable memory (TCAM) technology, the search database is fully scalable, while throughput and latency remain deterministic without the need for software realignment.
Xilinx’s SDNet development environment allows the generation of flexible programmable packet processors on an FPGA and scales performance of individual packet processing threads from 1 Gbps to 100 Gbps and beyond. The Xilinx packet processor enables access to any number of fields in the packet header or payload.
“As the deployment of Network Functions Virtualization (NFV) solutions begins, the unique capability of Xilinx’s in-service programmable packet processing, combined with dynamic NSE database table management, will simplify configuration and management of network equipment for IoT traffic processing,” said Hemant Dhulla, Vice President of Wired and Data Center Communications at Xilinx.
Renesas and Xilinx will demonstrate this solution at the Embedded Systems Expo during Japan IT Week, May 13-15, 2015.
For more information on Renesas S-Series network search engines, visit http://am.renesas.com/products/memory/nse/index.jsp.
About Renesas Electronics Corporation
Renesas Electronics Corporation (TSE:6723), the world's number one supplier of microcontrollers, is a premier supplier of advanced semiconductor solutions including microcontrollers, SoC solutions and a broad range of analog and power devices. Business operations began as Renesas Electronics in April 2010 through the integration of NEC Electronics Corporation (TSE:6723) and Renesas Technology Corp., with operations spanning research, development, design and manufacturing for a wide range of applications. Headquartered in Japan, Renesas Electronics has subsidiaries in approximately 20 countries worldwide. More information can be found at www.renesas.com.
|
Related News
- Accolade Technology Partners with Titan IC in Search Acceleration on FPGA-based SmartNICs and ATLAS Packet Conditioners
- Altera Demonstrates FPGA-Based Solutions at CAR-ELE JAPAN International Automotive Electronics Technology Expo
- Xilinx Demonstrates FPGA-Based Acceleration Technology for Next-Generation Data Centers at IBM Impact 2014
- Xilinx Kintex-7 FPGA Embedded Kit Accelerates Productivity and Programmable System Integration for FPGA-Based Soft Processor Systems
- Xilinx and Hitachi Information & Communication Engineering Announce New Virtex-6 FPGA-Based LogicBench Series Platform for System-Level Design Verification in Japan
Breaking News
- VeriSilicon partners with LVGL to enable advanced GPU acceleration for wearable devices and beyond
- HighTec C/C++ Compiler Suite Supports Andes' ISO 26262 Certified RISC-V IP for Automotive Safety and Security Applications
- Imagination DXS GPU IP recognised as game-changer for the car industry
- Think Silicon and LVGL Accelerate Graphics Libraries for Microcontrollers
- Silicon Creations Collaborates with Interex Semiconductor to Distribute High-Performance IPs in India
Most Popular
- Silicon Creations Collaborates with Interex Semiconductor to Distribute High-Performance IPs in India
- Think Silicon and LVGL Accelerate Graphics Libraries for Microcontrollers
- HighTec C/C++ Compiler Suite Supports Andes' ISO 26262 Certified RISC-V IP for Automotive Safety and Security Applications
- Government of India creating enabling environment for Semiconductor Design Community with direct access to National Chip Design Infrastructure
- Siemens' Solido SPICE now certified for multiple leading-edge Samsung Foundry processes
E-mail This Article | Printer-Friendly Page |