Camera SLVS-EC v.2.0 5.0Gbps / MIPI D-PHY v2-1 4.5Gbps combo Receiver 4-Lane
Invionics Offers Industry's First Development Platform for Custom Analog and Mixed-Signal EDA Tools
Verilog-AMS module extends Invio platform, enables mixed-signal IC innovation
Vancouver, British Columbia, May 19, 2015 – Invionics, a company providing software to automate the semiconductor design and verification process, today expanded the Invio(TM) Platform with a Verilog-AMS add-on module. The new module provides design engineers and CAD specialists with the industry’s first development platform for custom analog and mixed-signal EDA tools. The development platform will be demonstrated at the Design Automation Conference booth #2507, from June 7-11, 2015 at the Moscone Center in San Francisco.
The Verilog-AMS add-on module is the latest addition to the Invio Platform, which accelerates the design flow process by enabling faster and easier EDA tool development. The new module allows any mixed-signal application to be supported including automatic test generation, translation of Verilog-AMS based designs to other languages (SystemVerilog, Matlab, C, VHDL, etc.), and linting and quality checking of Verilog-AMS designs. The seamless integration within the Invio platform includes a connectivity view of simulation constructs allowing designers and CAD specialists to understand how analog components are interconnected with digital components.
“The market for EDA tools supporting analog and mixed-signal development is very underserved,” said Brad Quinton, CEO and founder of Invionics. “Until now, analog and mixed-signal designers and CAD specialists have had to use a patchwork of homegrown scripts and backdoor Verilog-AMS simulators. By using Invio with the Verilog-AMS module instead, our customers can finally take control over their tool flow to quickly produce the required EDA tools, and more importantly, focus on design innovation while bringing new products to market.”
Invio Platform
Today’s CAD groups and IC designers at semiconductor companies are increasingly building in-house custom EDA tools, flows and scripts that will enable competitive differentiation. The Invio Platform, announced in fall 2014, was developed to bring increased organization, reliability and accuracy to the internal tool development process. With an easy to learn Tcl or Python API, CAD and design engineers can create robust, high-performance EDA design tools and flows. The platform allows automated RTL changes that can be reviewed, audited and archived in a re-usable way. Adding customized automation to this point in the design process often dramatically reduces IC development time and cost. Previously announced modules include those for RTL Modification, Functional Verification, Netlist Modification and SoC Assembly.
Availability and Pricing
The Invio EDA Platform with the Verilog-AMS module is available now from Invionics. Customers benefit from a high degree of engaged support in a consultative environment by the Invionics team, which has experience designing, verifying and testing analog and mixed-signal chips, SoCs and devices. Pricing is available upon request.
For more information including a free 30-day trial, visit the Invionics website located at: www.invionics.com.
About Invionics
Invionics accelerates IC development and design automation. Leveraging hands-on hardware design experience and proven EDA tool development success, the company provides a custom EDA development platform that delivers immediate value to semiconductor, system and EDA companies. Invionics also provides experienced custom R&D to extend its platforms, enabling design teams to quickly implement key functionality and gain competitive advantage for their products. Corporate headquarters is located in Vancouver, British Columbia, Canada. Telephone: (604) 336-3325. Email: info@invionics.com. Website: www.invionics.com.
|
Related News
- INTERCHIP achieves 3x faster verification for next-gen clocking oscillator with Siemens' advanced analog and mixed-signal EDA technology
- ClioSoft and Silvaco Collaborate to Integrate ClioSoft's SOS Design Data Management Platform with Silvaco's Analog Custom Design Tools
- Artisan Changes the Rules Again -- Offers Free Analog and Mixed-Signal IP; UMC First to Offer Artisan's Free Analog and Mixed-Signal IP
- Siemens announces EDA milestones and tool certifications for TSMC's latest process technologies
- Cadence Digital, Signoff and Custom/Analog Tools Enabled on Samsung's 7LPP and 8LPP Process Technologies
Breaking News
- Keysight, Synopsys, and Ansys Deliver Radio Frequency Design Migration Flow to TSMC's N6RF+ Process Node
- Siemens collaborates with TSMC on design tool certifications for the foundry's newest processes and other enablement milestones
- Leveraging Cryogenics and Photonics for Quantum Computing
- Kalray Joins Arm Total Design, Extending Collaboration with Arm on Accelerated AI Processing
- Credo at TSMC 2024 North America Technology Symposium
Most Popular
- Huawei Mate 60 Pro processor made on SMIC 7nm N+2 process
- Silicon Creations Reaches Milestone of 10 Million Wafers in Production with TSMC
- GUC provides 3DIC ASIC total service package to AI/HPC/Networking customers
- Analog Bits to Demonstrate Numerous Test Chips Including Portfolio of Power Management and Embedded Clocking and High Accuracy Sensor IP in TSMC N3P Process at TSMC 2024 North America Technology Symposium
- Alphawave Semi: FY 2023 and 2024 YTD Trading Update and Notice of Results
E-mail This Article | Printer-Friendly Page |