IBM Demos III-V FinFETs on Silicon

CMOS Compatible Process for Advanced Nodes

R. Colin Johnson, EETimes
6/18/2015 10:20 PM EDT

PORTLAND, Ore.--The entire semiconductor industry is trying to find a way to exploit the higher electron mobility of indium, gallium and arsenide (InGaAs) without switching from silicon substrates, including the leaders at Intel and Samsung. IBM has demonstrated how to achieve this with standard CMOS processing.

Last month IBM showed a technique of putting III-V compounds of InGaAs onto silicon-on-oxide (SOI) wafers, but now a different research group claims to have found an even better way that uses regular bulk-silicon wafers and have fabricated the InGaAs-on-silicon FinFETs to prove it.

"Starting from a bulk silicon wafer, instead of SOI, we first put down an oxide layer and make a trench through to the silicon below, then grow the indium gallium arsenide from that seed--its a very manufacturable process," Jean Fompeyrine, manager of advanced functional materials told EE Times. Fompeyrine performed the work with Lukas Czornomaz, an advanced CMOS scientist with IBM Research.

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