Creonic Releases 4G 1 Gbit/s Turbo Decoder IP Core for LTE and LTE Advanced
Kaiserslautern, Germany, July 22, 2015 - Creonic GmbH, a leading IP core provider for communications, announced today the release of their off-the-shelf 4G LTE and LTE-A turbo decoder IP core for base station and mobile device markets. The IP core complements the company's comprehensive offer of forward error correction IP.
The LTE/LTE-A decoder supports 3GPP Release 8 and Release 10 specifications with data rates of up to 1 Gbit/s.All available code rates and block sizes of up to 6144 bits are supported. It was designed for LTE/LTE-A base station (BS) and mobile device (UE) applications, however the excellent error-correction-performance makes it the ideal fit for additional high-throughput applications, which require a large flexibility in code rates and block lengths.
The silicon-proven 4G LTE/LTE-A turbo decoder IP core isa low-power and low-complexity design. The decoder has a near optimal decoding performance even for very high code rates. In addition,an integrated CRC engine verifies the code block and the transport block CRC as well and stops the decoding process immediately to save energy.
The IP core is available for ASIC and FPGA (Xilinx and Altera) technologies either as source code or encrypted source code. In addition, the cores come with HDL simulation models, VHDL or SystemC testbench, bit-accurate Matlab, C or C++ simulation model and comprehensive documentation.
For more information, please visit the product page or contact us.
About Creonic
Creonic is an ISO 9001:2008 certified provider of ready-for-use IP cores for several algorithms of communications such as forward error correction (LDPC and Turbo coding), synchronization, and MIMO. The product portfolio covers standards like DVB-S2X, DVB-S2, DVB-RCS2, DVB-C2, WiFi, WiGig, and UWB. The products are applicable for ASIC and FPGA technology and comply with the highest requirements with respect to quality and performance. For more information please visit www.creonic.com.
|
Creonic Hot IP
Related News
- Creonic Releases Ultrafast BCH Decoder IP Core, Processing One Codeword per Clock Cycle
- TTTech Aerospace releases the world's first 1 Gbit/s A664 End System IP certified to the highest civil aviation standards
- Adesto's AFE IP Licensed by GCT Semiconductor for Advanced 4G LTE Modem
- Nujira releases new 16-band ET RF front-end for global LTE handsets
- Creonic Announces DVB-RCS2 Turbo Decoder IP Core
Breaking News
- Arteris Joins Intel Foundry Accelerator Ecosystem Alliance Program to Support Advanced Semiconductor Designs
- SkyeChip Joins Intel Foundry Accelerator IP Alliance
- Siemens and Intel Foundry advance their collaboration to enable cutting-edge integrated circuits and advanced packaging solutions for 2D and 3D IC
- Cadence Expands Design IP Portfolio Optimized for Intel 18A and Intel 18A-P Technologies, Advancing AI, HPC and Mobility Applications
- Synopsys and Intel Foundry Propel Angstrom-Scale Chip Designs on Intel 18A and Intel 18A-P Technologies
Most Popular
- QuickLogic Delivers eFPGA Hard IP for Intel 18A Based Test Chip
- Siemens collaborates with TSMC to drive further innovation in semiconductor design and integration
- Aion Silicon Joins Intel Foundry Accelerator Design Services Alliance to Deliver Next-Generation Custom SoCs at Scale
- TSMC Unveils Next-Generation A14 Process at North America Technology Symposium
- BOS Semiconductors to Partner with Intel to Accelerate Automotive AI Innovation
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |