Over 150 Fast Processor Models Now Available from the OVP Website
OXFORD, England -- September 09, 2015 -- Imperas™ today announces the release of the second generation of the Open Virtual Platforms™ (OVP™) APIs for building virtual platforms, additional Fast Processor Models, new models for popular peripherals and new Extendable Platform Kits™ (EPKs™). Open Virtual Platforms is a website for the OVP APIs, for the OVP models and platforms, for the OVPsim simulator and for community discussion of virtual platforms on the OVP Forum. The OVP APIs are publicly available and not proprietary, and the models and platforms are available under the Apache Open Source License.
“Additional models and platforms have been contributed by the user community, and now the OVP ecosystem is at the cutting edge of embedded software development.”
New to OVP:
- Support in the OVP APIs for unlimited hierarchy in virtual platforms
- Support in the OVP APIs for virtualized passing of packets between peripheral models
- ARC EM6 model
- SPARCv8 model (developed by Friedrich Alexander University)
- CAN, ethernet and USB models
- Altera Cyclone III Nios II Linux and Cyclone V HPS Cortex-A9MPx2 Linux EPKs
- Freescale Kinetis Cortex-M4 MQX and Vybrid Cortex-A5 MQX EPKs
- Xilinx MicroBlaze ML505 Linux
The addition of the ARC, ARM and SPARC Fast Processor Models brings the total number of CPU models available from OVP to over 150. The performance for these models under a typical load is hundreds of millions of instructions per second, with peak performance of billions of instructions per second. The library of fast processor models includes models of ARM processors from the ARMv4 through the ARMv8 architecture, a complete set of MIPS models, plus models of Altera Nios II, ARC, PowerPC, Renesas, SPARC and Xilinx MicroBlaze cores. Models are available with both C (OVP) interface and a C++ (SystemC) interfaces.
Extendable Platform Kits are designed to help accelerate embedded software development, debug and test. EPKs are virtual platforms (simulation models), including processor models plus peripheral models necessary to boot an operating system (OS) or run bare metal applications. The platform and peripheral models included in the EPKs are open source, so that users can easily add new models to the platform as well as modify the existing peripheral models. The example OS and/or applications are also included.
OVP models work with both the OVPsim and the Imperas simulators, including the QuantumLeap parallel simulation accelerator. OVPsim is used for academic and other non-commercial users (over 1,000 university departments current subscribe to the OVP website), while the Imperas products are for commercial users. Imperas M*SDK includes the OVP model library, iGen for model development, support for heterogeneous, multiprocessor / multicore processors, a comprehensive Verification, Analysis, and Profiling (VAP) tool set, plus an advanced 3-dimensional (temporal, spatial and abstraction) debug solution, 3Debug™, for heterogeneous multicore processor, peripheral, and embedded software debug. The VAP tool suite contains more than 50 tools supporting hardware-dependent software development, including OS and CPU-aware tracing (instruction, function, task, event), profiling, code coverage and memory analysis. The Imperas SlipStreamer™ patent-pending binary interception technology enables these analytical tools to operate without any modification or instrumentation of the software source code, i.e., the tools are completely non-intrusive.
"OVP is becoming the de facto source for models of processors,” said Simon Davidmann, president and CEO of Imperas. "Additional models and platforms have been contributed by the user community, and now the OVP ecosystem is at the cutting edge of embedded software development.”
For more information about Imperas, please see www.imperas.com.