Sep 29, 2015 - Truechip Solutions, the verification IP specialist, announced today that it has shipped early adopter version of its High Bandwidth Memory (HBM)Comprehensive Verification IP (CVIP) to its partners in the early adoption program.
This CVIP is natively developed in SystemVerilog (UVM) and is architected such that a single VIP is able to provide comprehensive, seamless block, SoC and System Level Verification across dynamic simulation, assertion based dynamic and formal verification, as well as support for hardware acceleration and emulation. The CVIP is compatible with all industry leading simulators and hardware platforms.
Nitin Kishore, CEO of Truechip, said in a statement, “HBM has been adopted as industry standard JESD235 by JEDEC. It achieves higher bandwidth while using less power in a substantially smaller form factor that DDR4. Release of this CVIP helps in meetingneeds our customers moving to such newer technology standards.”
To try out any of Truechip's high quality CVIPs or experience industry's first 24X5 support, please visit www.truechip.net.
Truechip is a leading provider of Verification IP solutions. Our products enable our customers to lower risks and costs associated with design and verification of their SoC, ASIC or FPGAs.
Truechip is also a member of MIPI Alliance (www.mipi.org) and also provides Verification IPs for MIPI interfaces. MIPI Alliance is a global, collaborative organization comprised of companies that span the mobile ecosystem and are committed to defining and promoting interface specifications for mobile devices.