First C-code-based Design Flow for Reconfigurable DSP Solutions
San Jose, Calif., September 3, 2002 -- Altera Corporation (NASDAQ: ALTR) today launched Code:DSP, a major initiative to extend the reach of FPGAs from multi-channel, high-performance signal processing functions to a wide range of mainstream DSP-based applications. Highlighted by the industry's first C-code based design flow for FPGAs, the Code:DSP initiative sharpens Altera's focus on the DSP market by offering designers a broad range of support services, tools, and development platforms for implementing reconfigurable DSP designs in leading-edge FPGA devices.
"By offering a C-code based design flow, Altera puts advanced FPGA-based reconfigurable DSP technology into the hands of DSP designers without forcing them to learn hardware description language," said Will Strauss of DSP industry watcher Forward Concepts. "For many DSP designers, the lack of a standard C-code based design flow has been a barrier to using FPGAs in a broad range of lower-performance, mainstream DSP applications." According to Forward Concepts, the market for DSP devices programmable in a C-code environment was over $5.8 billion last year.
In addition to the new design flow, Altera's Code:DSP initiative includes a development platform based on the industry's leading Stratix™ FPGA family as well as comprehensive support programs. By delivering a comprehensive set of DSP solutions, Altera is able to take advantage of opportunities in the DSP market that reach beyond the wireless infrastructure applications that are a traditional stronghold for FPGAs.
Design Flow Provides Advantages of Both Software and Hardware Development
In Altera's DSP design flow based on C code, the designer writes C code that executes on the Nios® embedded processor. For optimal implementation of DSP algorithms, the designer can use custom DSP instructions developed using MATLAB and Simulink tools. These custom instructions are integrated into the reconfigurable DSP design using Altera's DSP Builder and SOPC Builder tools. This flow is quicker and easier for DSP designers when compared to the traditional hardware description language-based design flows previously offered by FPGA vendors.
"By leveraging our embedded processor leadership with our comprehensive portfolio of DSP algorithm intellectual property (IP), we can offer DSP designers a standard C-code-based design flow, and a strong incentive to begin using it," stated Jordan Plofsky, senior vice president of applications business groups at Altera. "This offering positions Altera as the broadest-based DSP market supplier among PLD vendors, underscoring our intention to be one of the top suppliers to this market."
Stratix-Based Solutions Underpin Code:DSP Initiative
Stratix devices are the industry's first FPGAs to offer embedded DSP blocks, which include multiply-and-accumulate (MAC) structures that efficiently implement high-performance DSP functions such as finite impulse response (FIR) filters. In addition, the DSP capabilities of Stratix FPGAs can be extended with the use of an Altera patented technique for building "soft multipliers" using the TriMatrix™ memory structures, allowing DSP designers to balance device resource utilization to achieve maximum optimization. This technique increases the number of available multipliers up to 500 percent, which enables Stratix FPGAs to deliver DSP performance unmatched by any other available FPGA.
Today, DSP designers can take advantage of Altera's DSP algorithm IP MegaCores®, which are optimized for the Stratix FPGA architecture to take advantage of the device's embedded DSP blocks. Using Altera's DSP IP MegaCores, designers can build systems using fully customized FIR filters, fast-Fourier transforms (FFTs), Reed-Solomon encoders/decoders, numerically-controlled oscillators, and Viterbi encoders/decoders. Evaluation of these building blocks is free of charge via the OpenCore® flow, which is available to all users of Altera's Quartus® II 2.1 software.
Comprehensive Support For DSP Designers
Altera's Code:DSP initiative includes a complete support program for customers developing FPGA-based reconfigurable DSP designs. First, Altera has created a DSP chapter of its Certified Design Center (CDC) and Altera Consultants Alliance Program (ACAP®) to assist customers with their designs. Partner organizations all over the world, expert on Altera products, are available to provide localized DSP application expertise. Charter members of the DSP chapter include: Adaptive Micro-Ware, Colorado Electronic Product Design, Digital Design Corporation, Nuvation, Plexus Technology Group, Synopsys Professional Services, Vanteon, Alcahest, El Camino, Plextek, Telecom Italia labs, and Dexcel Electronics Designs.
Second, Altera has launched a new web-based DSP Solutions Center to provide comprehensive, up-to-date information and resources for DSP designers who want to reap the benefits of programmable logic. Finally, Altera offers training courses targeted at DSP designers who want to get up to speed quickly on the latest tips and techniques for creating efficient, high-performance DSP designs.
For more information on Altera's DSP offerings, visit the DSP Solutions Center at http://www.altera.com/dsp.
Altera Corporation (NASDAQ: ALTR) is the world's pioneer in system-on-a-programmable-chip (SOPC) solutions. Combining programmable logic technology with software tools, intellectual property, and technical services, Altera provides high-value programmable solutions to approximately 14,000 customers worldwide. More information is available at http://www.altera.com.