Gary Hilson, EETimes
10/13/2015 10:00 AM EDT
TORONTO – Researchers at the University of Toronto’s Integrated Systems Laboratory have have created a 20 Gb/s single-ended die-to-die transceiver to address some of the challenges presented by the technology likely to replace double data rate (DDR) memory.
“It’s clear the end of DDR is in sight, especially for high performance computing,” said Anthony Chan Carusone, a professor of electrical and computer engineering at U of T. The best alternatives on the horizon – memory stacked on top of a processor or stacked memory next to the processor – both present a series of challenges when balancing density, low latency and heat dissipation. If a memory cube is placed next to the processor, the heat dissipation issues are addressed, he said, but there needs to be an interface. “That’s really where the research comes in.”
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