Santander, Spain, October 29, 2015 - VISENGI, supplier of video compression and cryptography intellectual property (IP) for the automotive, aerospace, and professional video markets unveiled on September 30th at Altera SoC Developer Forum in Santa Clara, California, the availability of the smallest 8K H.264 Encoder in the market, capable of delivering 8K 25 fps on the mid-range Altera Arria 10 FPGAs, and now an overwhelming 8K 30 fps on the small and low-cost Xilinx Zynq-7030 FPGA.
Single engine for lowest size, power, and latency
For the first time in the market, 8K is possible without having to use multiple encoding engines inside one H.264 encoder, which up to now resulted in a higher latency, and required the largest high-range FPGAs, with the consequent huge penalty in power consumption.
On the contrary, VISENGI's unique H.264 single encoding engine architecture, sports the highest pixel encoding throughput in the industry, at a constant rate of 5.2 pixels encoded per cycle, while preserving the full color fidelity, by using subsampling 4:4:4.
VISENGI is able to offer the lowest latency 8K encoding solution: down to few hundred microseconds, thanks to its being based on a single encoding engine architecture.
At the same time it is able to fit into two thirds of the small Zynq-7030 FPGA, offering the lowest power consumption of any 8K encoding solution.
Integrate H.264 in a few clicks
In addition to unveiling the world of Ultra HD 4K 60 fps on Artix and Cyclone class FPGAs, as well as 8K on Zynq-7030 and Arria 10 mid-range FPGAs, VISENGI has packaged the IP core with a small set of industry standard AXI interfaces.
These embed DMA engines, for direct connection to memory, and optional streaming interfaces for row-wise pixel sources, all bundled as convenient plug-and-play IP blocks for Xilinx Vivado Block Design and Altera Quartus Qsys.
In this way, integrating the highest throughput H.264 Encoder in the market can be done in few mouse clicks to connect it to the pixel source and memory controller.
ARM Linux drivers for SW handling
Even though VISENGI's H.264 Encoder is a fully standalone IP core, it comes with all the tools to enable easy management from Zynq-7000 or Cyclone/Arria ARM SoC enabled FPGAs, by providing Linux drivers and sample C source code, which allow controlling the full capabilities of the H.264 encoder with near zero ARM CPU usage, thanks to its interrupt-driven nature.
This makes integrating the H.264 encoder into a project a matter of calling a few C functions to configure and start encoding, leaving the CPU to other tasks until encoding is finished, in order to packetize and send out the resulting H.264 video, with yet another simple set of functions to read the file from CPU accessible memory.
VISENGI is a European engineering firm founded in 2009, built around an extensive knowledge and working experience on developing the highest throughput IP cores for data processing.
Its products range from encoders and decoders for JPEG and PNG standards, to the fastest H.264 Encoder in the industry, and SHA & AES crypto solutions.
It has specialized in IP core and system design of full video pipelines for FPGA and ASIC targets, leveraging ARM SoCs to enable a simple user SW control of its high speed HW IP cores.
For more information, please visit http://visengi.com/products/h264_encoder or contact email@example.com