A Look at Metal eFuses

Kevin Gibb, Product Line Manager, TechInsights
EETimes (11/8/2015 12:00 PM EST)

TechInsights reverse engineers chips to understand how they are made and in some cases why certain structures are the way they are. This article examines two electrically blown fuse structures (eFuse) used in metal gate logic processes. This first eFuse structure that we look at is made by Intel and the second by TSMC.

We first observed the eFuses in Intel’s 32nm high-k metal gate (HKMG) fabbed Westmere/Clarkdale processor (circa 2009). At the time, Intel was using the eFuses as part of a one-time programmable read-only memory (OTP-ROM). We now appreciate that their use can include the holding program code, on-chip configuration data and cryptographic keys.

Prior to metal gates, electrically-blown on-chip fuses were typically made from the polysilicon gate layer. But with the advent of metal gate CMOS processes, polysilicon was no longer available as a fuse element. What to do?

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