Process Detector (For DVFS and monitoring process variation), TSMC 12FFC
Minimizing BoM cost and silicon area thanks to Dolphin Integration's iLR-LaDiable capless regulator
Grenoble, France – November 16, 2015 -- IoT and wearable devices have added to the challenge of reduction of BoM cost and silicon area that of changing the principles of voltage regulators to the point that their efficiency is no longer the major criteria.
Embedding features such as the Power Management Network (PMNet) in a SoC demands going further in the quest of performance: the new capless linear regulator iLR-LaDiable reaches the operating zone to the best performances while preserving the stability.
Indeed, using a Delta architecture without an external capacitor implies relying on the load capacitance instead: ensuring a correct matching is essential to avoid any load transient variation. In order to secure capless regulator implementation, Dolphin Integration includes in its specifications all the needed templates, profiles and abacus enabling sizing the load capacitance for required load transient performances.
- Maximum Output current of 50 mA
- 0.8 to 3.3 V programmable output voltage
- Capless linear regulator (no off-chip capacitor needed)
- Delivered with load transient template and abacus to ensure the proper matching between the regulator and its load
- Complemented with an Over-voltage Protection Module (OPM) enabling to support a [1.9 V - 4.4 V] input voltage range for direct connection to a Li-Ion battery.
The iLR-LaDiable is the suitable regulator for supplying logic loads such as embedded memories and logic power Islands. To reach better optimizations of the overall SoC, Dolphin Integration offers a complete set of solutions, including High Density Memories and Standard Cell Libraries.
For more information about regulation components per the Delta Standard, contact us or provide your information to be contacted asap.
About Dolphin Integration
Dolphin Integration contributes to "enabling low-power Systems-on-Chip" for worldwide customers - up to the major actors of the semiconductor industry - with high-density Silicon IP components best at low-power consumption.
The "Foundation IP" of this offering involves innovative libraries of standard cells, register files and memory generators. The "Fabric IP" of voltage regulators, Power Island Construction Kits and their control network MAESTRO enable a flexible assembly with their loads. They especially star the "Feature IP": from high-resolution converters for audio and measurement applications to power-optimized 8 or 16 and 32 bit micro-controllers.
Over 30 years of experience in the integration of silicon IP components, providing services for ASIC/SoC design and fabrication with its own EDA solutions, make Dolphin Integration a genuine one-stop shop addressing all customers' needs for specific requests.
It is not just one more supplier of Technology, but the provider of the DOLPHIN INTEGRATION know-how!
The company strives to incessantly innovate for its customers’ success, which has led to two strong differentiators:
- state-of-the-art “panoplies of Semiconductor IP components” for high-performance applications securing the most competitive SoC architectural solutions,
- a team of Integration and Application Engineers supporting each user’s need for optimal application schematics, demonstrated through EDA solutions enabling early performance assessments.
Its social responsibility has been from the start focused on the design of integrated circuits with low-power consumption, placing the company in the best position to now contribute to new applications for general power savings through the emergence of the Internet of Things.
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