Innovative power saving methods extend battery life of wearable devices from three to six days
TORONTO and LAS VEGAS -- December 15, 2015 -- CES 2016 -- Think Silicon announced today the release and immediate availability of NEMA|p(PICO) the world smallest (0.07mm2 die-area, two times smaller than the competition) and most power efficient (0.05 mW leakage) 2D Graphics Processor Unit (GPU). NEMA|p has a new bottom up architecture, featuring a number of ultra low-power saving methods such as a fixed rate, real time 4bpp/6bpp frame buffer compression/decompression (TSFBc), DAT (Display Aware Technology), CAT (Context Aware Technology) and 25 MHz low frequency SoC support helping to significantly lower power consumption. NEMA|p has been specifically designed for area constrained wearable devices, embedded systems and IoT platforms where power consumption and battery life is crucial and cost efficiency are critical factors while still maintaining vibrant graphics and fluid 2D User Interface (UI) performance.
The Think Silicon exhibit, hosted at the CES Sands Expo Level 1 Hall Booth# 81349, will showcase the NEMA|PICO and NEMA|TINY, the world smallest multi-core 3D GPU, amongst an array of innovations powered by the latest Think Silicon GPU technologies such as "RAPID", an IoT GUI building tool, as well as a demonstration of the upcoming Vulkan™ API.
"Our customers asked for a very small, ultra-low power but still robust GPU, supporting small and smart display applications," said Ulli Mueller, Vice President Marketing of Think Silicon. "They told us their goal is to create compelling GUIs, without breaking the bank. We listened and the result we designed is a sleek piece of technology tailored for cost sensitive applications and markets."
The one-core GPU can be customized for small footprint devices and configured for small displays up from 1.5" to 6.0" and XGA (1024x768) resolutions. NEMA|p supports SoCs with a 32-bit MCU (e.g. ARM® Cortex®-M processors) and core frequencies that reach as low as 25MHz (not limited).
The very small silicon footprint of just 0.07mm2 (150 MHz in 28nm) with ultra-low leakage power of just 0.05mW and memory power consumption of just 0.03mW (in DDR-less systems) features a fully configurable and programmable 2D graphics rendering engine and has innovative composition functionalities.
The NEMA|p is available in Verilog HDL code, supports AMBA interfaces (AHB, AXI), and embeds DMA controllers with command list for minimal CPU overhead. NEMA|p comes with drivers for FreeRTOS, Linux OS, software libraries for graphics APIs such as DirectFB, μGFX, QT, GTK+ and a bare metal C library for OS-less systems.
The NEMA|p is available for licensing now. Contact email@example.com for more information.
About Think Silicon:
Think Silicon S.A. (TSi) is a privately held Limited Company founded in 2007, located in Patras, Greece (HQ), Toronto, Canada (Business Development & Marketing office) and San Jose, CA, USA (Sales office). The Think Silicon team specializes in developing high performance graphics IP technology for ultra-low power and area limited IoT applications.