Verisity and Be One Lab Meeting Growing Demand For eVCs; Be One Lab Offering SONET/SDH, SPI4 And UTOPIA 4 To Verification Market

MOUNTAIN VIEW, Calif., Sep 9, 2002 (BUSINESS WIRE) -- Verisity, Ltd. (Nasdaq:VRST), the leading provider of functional verification automation tools, and Be One Lab Inc., a Verification Alliance(TM) partner, today announced the availability of three new e Verification Components (eVCs(TM)) from Be One Lab. SONET/SDH, SPI4, and UTOPIA4 are Be One Lab's initial offerings of reusable, plug-and-play verification components for standard interfaces based on Verisity's high-level verification language, e. These three eVCs, which were developed using Specman Elite(TM), will be eRM compliant by Q402, meeting the standard requirements for full interoperability with all other eVCs developed using Verisity's e Reuse Methodology (eRM(TM)) (see related release, "Verisity Announces e Reuse Methodology," dated September 9, 2002).

"Be One Lab is a proud Verification Alliance(TM) program charter member and today's announcement completely reaffirms our commitment to the program and its mission." said Issac Lian, President and CEO of Be One Lab. "Since we began specializing in Specman Elite(TM) based solutions, our clients in Canada, USA, and China have voiced their increasing need for reusable, reliable verification components. These new eVCs offer the ASIC community measurable enhancements in verification productivity."

"The SONET/SDH, SPI4, and UTOPIA4 eVCs are valuable additions to the growing pool of verification components developed by Verisity's Verification Alliance partners," said Dave Tokic, director of strategic marketing for Verisity. "Be One Lab has answered the call from verification teams to deliver the right solutions to their verification challenges. The eVCs for SONET/SDH, SPI4, and UTOPIA4 are critical components of verification environments for any design containing these standards."

About SONET/SDH eVC
The SONET/SDH eVC was developed based on SONET OC48C and SDH_AU_TU designs. Be One Lab has applied its proprietary methodology to guarantee 100% coverage on FSM testing, which is the core of the SONET/SDH standard. The SONET/SDH eVC offers users measurable productivity gains especially in difficult areas of the SONET/SDH standard like pointer interpretation, pointer generation, AU_TU framing and deframing, and H4 processing at STM-C and AU-TU levels.

About SPI4 eVC
The SPI4 comes complete with a test case matrix that covers all features of the SPI4 specification. The SPI4 eVC supports configuration of multiple ports and utilizes the latest plug-and-play eVC methodology to ensure full compatibility and interoperability with other eVCs.

About UTOPIA4 eVC
The UTOPIA4 eVC comes with a complete test case matrix that covers all features of the ATM standard. The UTOPIA4 eVC also supports configuration of multiple ports and utilizes the latest plug-and-play eVC methodology to ensure full compatibility and interoperability with other eRM compliant eVCs.

A combination of training, support, and consulting service is available from Be One Lab on the above verification components.

e Verification Components
Each eVC includes three integrated components: a stimuli generator for injecting and generating traffic, monitors and checkers for viewing outputs and checking protocol rules, and coverage reports showing the functional coverage of scenarios. They can be used in a variety of design applications and are available for a wide array of industry standards.

eVCs foster verification reuse because they can easily be moved from the module-level verification to SoC-level verification, as well as from one chip design to another. Users can drop them into their designs and drastically cut the time it takes to create a verification environment.

For a complete listing of eVCs available, please visit http://www.verisity.com and customers can log in to https://www.verificationvault.com.

e Reuse Methodology (eRM)
eRM provides dramatic functional verification productivity gains, most notably for advanced ASICs, SoCs and processors. eRM is a complete reuse methodology that codifies the best practices for eVC development. eRM delivers a common eVC usage model, and ensures that all eRM compliant eVCs will interoperate seamlessly regardless of origin. In addition, new eRM technology in Specman Elite, Verisity's flagship testbench automation tool, increases the power of eRM compliant eVCs to generate and synchronize complex multi-transaction scenarios.

Availability
The SONET/SDH, SPI4, and UTOPIA4 eVCs work with Verilog and VHDL devices and simulators that are supported by Specman Elite and will be available starting August 2002. These eVCs come with complete documentation and example configurations for typical verification environments.

About Be One Lab Inc.
Be One Lab is a consulting company specializing on achieving "1+0" ASIC/FPGA verification. "1" refers to "Verfication coverage towards 100% 1 month after rtl code freeze", "0" refers to "0 maintenance on work done or first pass". Be One Lab started using Specman Elite in 1998 when it was first introduced to the North American market. Be One Lab has successfully used Specman Elite in over 7 multi-million gate ASIC/FPGA projects at companies like Newbridge, Alcatel, Maple Optical Systems, Calix Networks, Infineon, and more. Be One Lab opened its China solution center in 2001 to offer an offshore alternative to interested clients.

Be One Lab's Specman Elite-based testbench infrastructure has been licensed to multiple companies. In addition to the strong methodology capability, Be One Lab is also dedicated to design, and develops e and Specman Elite (testbench automation tool) based reusable Verification Components.

Be One Lab's "1+0" verification methodology, centered on Verisity's Specman Elite technology, has been applied on multiple first pass multi-million gate designs. As a young and dynamic company, Be One Lab is working hard to establish ongoing or referable client relationship with old and new clients, to meet the ever-increasing demands, both technical and business wise, that today's market requires on the ASIC community. For more information on Be One Lab, visit http://www.b1lab.com or write to us at contact@b1lab.com

About Verisity
Verisity is the leading provider of proprietary technologies and software products used to efficiently verify designs of electronic systems and complex integrated circuits that are essential to high growth segments of the electronics industry. Verisity's products automate the process of detecting flaws in these designs, enabling customers to deliver higher quality products, accelerate time-to-market and reduce overall product development costs. Verisity Design, Inc.'s principal executive offices are located in Mountain View, Calif. The Company's principal research and development offices are located in Rosh Ha'ain, Israel. For more information, see Verisity's web site at www.verisity.com.

Verisity is a registered trademark of Verisity Design, Inc. eVC, Specman Elite and Verification Alliance are trademarks of Verisity Design, Inc. All other trademarks are the property of their respective holders. All other trademarks are the property of their respective owners.