Multiple Customer Tapeouts Completed with Synopsys Flow on the 14nm Process
MOUNTAIN VIEW, Calif., March 2, 2016 -- Synopsys, Inc. (Nasdaq: SNPS) today announced that Samsung Foundry has certified the Synopsys Galaxy™ Design Platform for Samsung's 14LPP FinFET process. The process delivers high performance for compute-intensive designs and lower power consumption for mobile applications. With multiple tapeouts, including many designs in volume production, the Galaxy-based 14LPP flow featuring Advanced Waveform Propagation (AWP) in Synopsys' PrimeTime® ensures multi-gigahertz (GHz) performance at waveform-sensitive ultra-low voltage operation. This certification also produced a reference flow, compatible with the Lynx Design System that includes scripts for automation and design best practices.
"This certification and reference flow for our 14LPP process was made possible through close collaboration between Samsung and Synopsys," said Ben Suh, senior vice president of sales and marketing at Samsung Foundry. "Design engineers can confidently move their designs to volume production on our advanced FinFET-based process using the silicon-proven Galaxy Design Platform flow."
"Our collaboration with Samsung is focused on enabling designers to get the optimum QoR with highest confidence on the latest 14LPP FinFET process," said Bijan Kiani, vice president of product marketing for Synopsys' Design Group. "Together, Samsung Foundry and Synopsys continue to ensure that engineers can implement their most advanced designs and bring them to market with a predictable schedule."
Key Synopsys tools and features of this Galaxy Design Platform reference flow, certified using the ARM® Cortex®-A53 processor, include:
- Design Compiler® Graphical synthesis: Correlation, congestion reduction and physical guidance for IC Compiler™ II place and route system
- DFTMAX™ and TetraMAX® test solution: FinFET-based, cell-aware testing and slack-based transition delay for better yield
- Formality® formal verification: UPF-based equivalence checking with state transition verification
- IC Compiler II place and route: Double-patterning aware physical implementation featuring advanced design planning for optimized module placement and timing
- IC Validator signoff physical verification: In-Design, automated DRC repair, pattern matching and metal fill within IC Compiler II; and LVS signoff
- PrimeTime timing signoff solution: Ultra-low voltage timing signoff with Advanced Waveform Propagation (AWP), variation-aware analysis and placement rule-aware engineering change order (ECO) guidance
- StarRC™ extraction solution: Double-patterning, full color-aware variation and 3D FinFET modeling
- PrimeRail reliability analysis: Rail analysis for electromigration and IR-drop integrity
The 14LPP reference flow is compatible with the Synopsys Lynx Design System, a full-chip design environment that includes innovative automation and reporting capabilities to help designers implement and monitor their designs. It includes a production RTL-to-GDSII flow that simplifies and automates many critical implementation and validation tasks, enabling engineers to focus on achieving performance and design goals.
The Galaxy Design Platform reference flow for Samsung Foundry's 14LPP and 28LPP processes are available for download from Samsung Foundry.
Synopsys, Inc. (Nasdaq:SNPS) is the Silicon to Software™ partner for innovative companies developing the electronic products and software applications we rely on every day. As the world's 16th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software quality and security solutions. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest quality and security, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at www.synopsys.com.