TSMC Details Silicon Road Map
FinFETs will fly from 16nm to 7nm
Rick Merritt, EETimes
3/16/2016 06:30 AM EDT
SAN JOSE, Calif.—Taiwan Semiconductor Manufacturing Co. Ltd. is ramping its 16nm process and making progress on plans to roll out 10 and 7nm nodes over the next two years. The news injected optimism in a crowd of about 1,500 attendees at a Silicon Valley event here where the world’s largest independent chip foundry shared its long-sought success with FinFETs and the great unknown beyond.
Some observers were underwhelmed, claiming TSMC’s road map to 7nm will only bring it in line with the 14nm process in which Intel is currently ramping its Skylake CPUs.
Indeed, even TSMC executives noted its 10 and 7nm nodes will have minimum feature sizes of about 20 and 14nm, respectively. And they all use the same fundamental FinFET transistor structures Intel pioneered at 22nm and 14nm. However, they also reported significant progress on research on post-FinFET devices.
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |
|
Related News
- TSMC Adds High-K Metal Gate Low Power Process to 28nm Road Map
- Silicon Topology Joins TSMC Design Center Alliance (DCA)
- TSMC Details The Benefits of Its N3 Node
- Analog Bits to Present Papers, Demo of N5 Working Silicon, and Roadmap on IPs for TSMC N4 and N3 Processes
- Cadence Demonstrates IP Test Silicon for PCI Express 6.0 Specification on TSMC N5 Process
Breaking News
- Truechip Announces First Customer Shipment of CXL 3 Verification IP and CXL Switch Model
- Vidatronic Expands Portfolio of Power Management, Analog, and Security IP with Additional 180 nm to 22 nm Technologies for IoT Applications Available for Licensing
- SMIC Reports 2022 Second Quarter Results
- Opinion: CHIPS Act Escalates Long-Standing U.S.-China Tech Rivalry
- Tudor Brown resigns from SMIC