MOUNTAIN VIEW, Calif., March 28, 2016 -- Synopsys, Inc. (Nasdaq: SNPS) today introduced Cheetah, a breakthrough simulation technology, as part of the Synopsys VCS® verification solution. Cheetah leverages fine-grained parallelism and the latest advancements in CPU and GPU architectures to enable a simulation speed-up of up to 5X for RTL designs and up to 30X for gate-level designs.
"Verification complexity grows 4X every two years while simulation performance is only improving 10-20 percent year-to-year. Today's GPUs offer enormous acceleration for parallel computing workloads and superior performance scaling generation-to-generation," said Jonah Alben, senior vice president of GPU engineering at NVIDIA. "Logic simulation/verification has an opportunity to leverage these capabilities for simulation acceleration, and Synopsys' VCS Cheetah technology is the right step in that direction."
Simulation continues to be the workhorse of SoC verification flows and accounts for the vast majority of verification tasks. As such, simulation performance is the most critical element in the ability to handle growing SoC complexity and size, as well as achieve time-to-market goals. Since its introduction in 1992, VCS has led the industry in delivering the highest simulation performance. For more than 20 years, the industry's largest SoCs have been verified with VCS.
Synopsys VCS has continually introduced groundbreaking technologies such as Roadrunner, Radiant, Native Testbench, Native Low Power and many more native optimizations for single-core performance.
Over the past few years, the opportunity for parallel algorithms has emerged due to availability of many-core architectures with high bandwidth memory. For example, today's leading server-class processor architectures provide up to 72 CPU cores and 1152 vector cores, and GPU architectures provide up to 3072 cores.
Many-core architectures have opened up a new paradigm for simulation acceleration – 'Fine-Grained Parallelism' (FGP). With FGP, a design model is decomposed into micro-tasks and events that can then be massively parallelized. The patented Cheetah technology uses intelligent Hardware Adaptive Algorithms to leverage FGP and other VCS performance technologies to optimize task scheduling, synchronization overhead, dynamic load balancing, cache efficiency and overall simulation performance for the target processor architecture. In heterogeneous environments where a mix of processors, GPUs and hybrid architectures are available, Cheetah technology can speed-up simulation by up to 5X on RTL and up to 30X on gate-level designs. Large SoC RTL and gate-level DFT netlist simulation, typically running for days to weeks on single-core simulators, can now be optimally parallelized and completed in hours.
"To address growing verification challenges, Synopsys continues to focus on delivering industry-leading performance innovations in VCS," said Manoj Gandhi, executive vice president and general manager of the Verification Group at Synopsys. "We are excited about the performance opportunity with fine-grained parallelism on the new CPU and GPU architectures as we collaborate with the industry leaders. We plan to roll out Cheetah technology over the next two years as part of VCS."
Synopsys, Inc. (Nasdaq:SNPS) is the Silicon to Software™ partner for innovative companies developing the electronic products and software applications we rely on every day. As the world's 16th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software quality and security solutions. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest quality and security, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at www.synopsys.com.