Template Assistants Shorten Layout Tasks
MOUNTAIN VIEW, Calif. -- March 30, 2016 -- Synopsys, Inc. (Nasdaq: SNPS) today announced that STMicroelectronics (ST), a global semiconductor leader serving customers across the spectrum of electronics applications, is deploying Custom Compiler™ for custom design, initially starting with 28-nanometer (nm) FD-SOI IP development. Custom Compiler is Synopsys' new solution that was also announced today (see today's news release). After an extensive evaluation and qualification for custom design and layout, Custom Compiler is being used for production work from schematic entry through custom layout at ST sites in France and India.
"ST has adopted Custom Compiler for 28-nm FD-SOI standard cell and memory layout," said Cyril Colin-Madan, Design Platform director at STMicroelectronics. "We evaluated the tool across a number of metrics to ensure it meets our requirements and a key factor in our decision to adopt it was the improvement in productivity. Custom Compiler's Template Assistants make it easy to apply previous layout decisions to new designs, which helps us shorten layout tasks from days to hours for a typical cell."
Custom Compiler Template Assistants let designers store and reuse custom design templates. A template lets designers save useful placement or routing patterns and apply them to new designs. Synopsys has been using this approach for its own IP development to shorten custom layout tasks. Now with Custom Compiler, Template Assistants are also available to Synopsys customers.
"ST was a key partner during the development of Custom Compiler," said Antun Domic, executive vice president and general manager at Synopsys. "They helped refine and validate the complete custom flow in Custom Compiler and gave great feedback to make Custom Compiler easy to deploy for large multi-national teams. We are working in close collaboration with ST to deploy Custom Compiler to their IP design community."
About Custom Compiler
Custom Compiler shortens the time it takes to complete FinFET design tasks from days to hours. Its visually-assisted automation leverages the graphical use model familiar to layout designers while eliminating the need to write complicated code and constraints. With Custom Compiler, routine and repetitive tasks are dealt with automatically without extra setup. Custom Compiler's visually-assisted automation provides four types of assistants: Layout, In-Design, Template and Co-Design. Layout Assistants speed layout with user-guided automation of placement and routing. In-Design Assistants reduce design iterations by catching physical and electrical errors before signoff verification. Template Assistants help designers reuse existing know-how by making it easy to apply previous layout decisions to new designs. Co-Design Assistants combine the IC Compiler™ place and route system and Custom Compiler into a unified solution for custom and digital implementation. Custom Compiler is based on the industry standard Open Access database. It provides an open environment spanning schematics, simulation analysis and layout. Unified with Synopsys' circuit simulation, physical verification and digital implementation tools, Custom Compiler provides a comprehensive custom design solution. For more information about Custom Compiler, visit www.customcompiler.info.
Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software™ partner for innovative companies developing the electronic products and software applications we rely on every day. As the world's 16th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software quality and security solutions. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest quality and security, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at www.synopsys.com.