“Energy Processing for Power-Sensitive SoCs” Seminar Series Highlights Real-World Power Savings Using New ICE-G1 EPU
Milpitas, Calif. – May 3, 2016 – Sonics, Inc., the world’s foremost supplier of on-chip network (NoC) technologies and services, today announced that it has developed the IP industry’s first Energy Processing Unit (EPU) based on the company’s ICE-Grain™ (Instant Control of Energy) Power Architecture originally introduced in 2015. Sonics’ ICE-G1™ product is a complete EPU enabling rapid design of system-on-chip (SoC) power architecture and implementation and verification of the resulting power management subsystem. Sonics also announced the “EnProcessing for Power-Sensitive SoCs” seminar series which highlights power savings results from real-world customer use cases.
No amount of wasted energy is affordable in today’s electronic products. Designers know that their circuits are idle a significant fraction of time, but have no proven technology that exploits idle moments to save power. An EPU is a hardware subsystem that enables designers to better manage and control circuit idle time. Where the host processor (CPU) optimizes the active moments of the SoC components, the EPU optimizes the idle moments of the SoC components. By construction, an EPU delivers lower power consumption than software-controlled power management. EPUs possess the following characteristics:
- Fine-grained power partitioning maximizes SoC energy savings opportunities
- Autonomous hardware-based control provides orders of magnitude faster power up and power down than software-based control through a conventional processor
- Aggregation of architectural power savings techniques ensures minimum energy consumption
- Reprogrammable architecture supports optimization under varying operating conditions and enables observation-driven adaptation to the end system.
The Sonics’ ICE-G1 EPU accelerates the development of power-sensitive SoC designs using configurable IP and an automated methodology, which produces EPUs and operating results that improve upon the custom approach employed by expert power design teams. As the industry’s first licensable EPU, ICE-G1 makes sophisticated power savings techniques accessible to all SoC designers in a complete subsystem solution. Using ICE-G1, experienced and first-time SoC designers alike can achieve significant power savings in their designs.
ICE-G1 is currently available on a limited basis to qualified customers. ICE-G1 works with all internal and third-party IP offerings from processors to I/Os to NoCs. Combining the ICE-G1 EPU with the SonicsGN® NoC simplifies fine-grained power management for SoC integration teams.
Markets for ICE-G1 include:
- Application and Baseband Processors
- Tablets, Notebooks
- EnergyStar compliant systems
- Form factor constrained systems—handheld, battery operated, sealed case/no fan, wearable.
ICE-G1 key product features are:
- Intelligent event and switching controllers–power grain controllers, event matrix, interrupt controller, software register interface—configurable and programmable hardware that dynamically manages both active and leakage power.
- SonicsStudio® SoC development environment—graphical user interface (GUI), power grain identification (import IEEE-1801 UPF, import RTL, described directly), power architecture definition, power grain controller configuration (power modes and transition events), RTL and UPF code generation, and automated verification test bench generation tools. A single environment that streamlines the EPU development process from architectural specification to physical implementation.
- Automated SoC power design methodology integrated with standard EDA functional and physical tool flows (top down and bottom up)—abstracts the complete set of power management techniques and automatically generates EPUs to enable architectural exploration and continuous iteration as the SoC design evolves.
- Technical support and consulting services—including training, energy savings assessments, architectural recommendations, and implementation guidance.
About the Seminar Series
The “Energy Processing for Power-Sensitive SoCs” seminar series agenda covers:
- Why power management is a MUST HAVE capability to successfully address power-sensitive application and market requirements
- Fundamentals of SOC power management
- Defining characteristics of an EPU
- Power savings results from real-world examples
- EPU for widely available, commercial 4K video decoder
- EPU for sensor designs without a host processor
- ICE-G1 technology overview and demonstration.
Wednesday, May 25th, 11:00 am – 1:00 pm
Santa Clara Hyatt Regency, 5101 Great America Parkway
Mendocino Room (second floor)
Monday, June 6th, 11:00 am – 1:00 pm
Austin Hilton (DAC HQ), 500 East 4th Street
Meeting room 408, (fourth floor)
Sonics will announce Japan, Korea, and Taiwan seminar locations and dates over the summer.
For individuals and companies interested in attending the seminars, please send an email request to:
About Sonics, Inc.
Sonics, Inc. (Milpitas, Calif.) is the trusted leader in on-chip network (NoC) and power-management technologies used by the world’s top semiconductor and electronics product companies, including Broadcom®, Intel®, Marvell®, MediaTek, and Microchip®. Sonics was the first company to develop and commercialize NoCs, accelerating volume production of complex systems-on-chip (SoC) that contain multiple processor cores. Sonics’ ICE-Grain Power Architecture is the IP industry’s first complete power management solution, which enables SoC designers to exploit “dark silicon” states to save more energy than conventional software-based approaches. Sonics is also a catalyst for ongoing discussions about design methodology change via the Agile IC Methodology LinkedIn group. Sonics holds approximately 150 patent properties supporting customer products that have shipped more than four billion SoCs. For more information, visit sonicsinc.com.