Single I/O product supports multiple JEDEC standard
SAN FRANCISCO, CA –September 30, 2002 –TriCN, a leading developer of intellectual property (IP) for high-speed semiconductor interface technology, today announced the immediate availability of its new MFI/O (Multi-Function Input/Output) interface solution. TriCN's MFI/O offers the functionality of numerous JEDEC (Joint Electronic Device Engineering Council) interface standards within a single I/O. As a result, customers now have the flexibility of employing one of four different I/O standards simply by changing the power supply to the interface.
"The beauty of this solution is that it mimics the flexibility found in an FPGA process, where this is achieved via a metal mask change," explains Ron Nikel, Chief Technology Officer of TriCN. "Our MFI/O brings that same flexibility to the more cost effective world of ASIC/COT with a simple power adjustment."
Multiple JEDEC Standards
TriCN's MFI/O supports the functionality of the following JEDEC interface standards: LVTTL, HSTL (Class I or II), SSTL-2 (Class I or II), and MDI/O interface. The I/Os are intended for use in GMII, CSIX L1, DDR SDRAM and SDR SDRAM interface applications that do not exceed operating frequencies of 200 MHz.
"We created our MFI/O solution as the result of customer demand for a single I/O flexible enough to meet the requirements of several different I/O standards" said Nikel. "The MFI/O frees our customers from having to purchase multiple pieces of IP. Moreover, because all the functionality is within one IP product, it eliminates any issues of IP interoperability, saving our customers time and money."
TriCN's MFI/O interface solution is available immediately for flip chip and bond wire applications in several variations of the TSMC 0.13um process, including 1.0V core supply (low voltage) process.
Founded in 1997, San Francisco, California-based TriCN is a leading developer of high- performance semiconductor interface intellectual property (IP). The company provides a complete portfolio of IP for maximizing data throughput on and off the chip. This IP is designed for IC developers addressing bandwidth-intensive applications, in the communications, networking, data storage, and memory space. TriCN's IP answers these challenges by delivering validated, industry-leading I/O performance and bandwidth density while dramatically streamlining design complexity and time-to-market. TriCN's customers range from startup to established fabless semiconductor and systems companies, including Philips, MIPS Technologies, SGI, IBM, Cognigine, Internet Machines, and Apple Computer.
For more information, please visit TriCN's web site at www.tricn.com.