Analog Bits to deliver two presentations on 16nm IP at TSMC Open Innovation Platform Ecosystem Forum
Santa Clara, CA, September 22, 2016 – Analog Bits (www.analogbits.com), the semiconductor industry’s leading provider of low-‐power mixed-‐signal IP (Intellectual Property) solutions will be presenting on two topics at the TSMC Open Innovation Platform (OIP) Ecosystem Forum. The first presentation will discuss a novel approach to keeping size small and power low, resulting in de-‐ risking SOC development while providing increased flexibility. The second presentation, delivered jointly with Mentor Graphics, will discuss design and verifications techniques for SERDES IP development on the latest 16FFC process geometry. Analog Bits will also be demonstrating the latest low-‐power mixed signal IP, including their industry leading multi-‐standard SERDES at booth 302.
WHAT: Analog Bits latest 16nm FFC Mixed Signal IP products
SERDES IP ProductsClocking IP Products
- Half-‐power SERDES IP supporting PCIe Gen 3/4, HMC 2.0, 10G-‐KR.
Sensors IP Products
- Wide range, Fine resolution and Customizable PLL & DLL IP cores
- On-‐die sensors for real-‐time monitoring of Process, Voltage and Temperature (PVT)
WHEN: September 22, 2016
13:00 -‐ 13:30: IP Track Presentation17:00 – 17:30 EDA Track Presentation
- Mahesh Tirupattur, Executive Vice President, Analog Bits
- Silicon-‐proven, low power IP for TSMC 16nm FFC for Automotive to Datacenter SOC's
10:30 – 18:30: Ecosystem Pavilion, Booth 302
- Alan Rogers -‐ President & CTO, Analog Bits
- Design and Verification of 16nm FFC Low Power SERDES for Datacenter and Automotive Applications
WHERE:
TSMC 2016 Open Innovation Platform® Ecosystem Forum
San Jose McEnery Convention Center
150 West San Carlos St. San Jose, CA 95113
About Analog Bits:
Founded in 1995, Analog Bits, Inc. (www.analogbits.com), is the leading supplier of mixed-‐signal IP with a reputation for easy and reliable integration into advanced SOCs. Products include precision clocking macros such as PLLs & DLLs, programmable interconnect solutions such as multi-‐protocol SERDES and programmable I/O’s as well as specialized memories such as high-‐speed SRAMs and TCAMs. With billions of IP cores fabricated in customer silicon, from 0.35-‐micron to 16/14-‐nm processes, Analog Bits has an outstanding heritage of "first-‐time-‐working” with foundries and IDMs.
|
Related News
- Analog Bits to demonstrate Low Power SERDES at TSMC's Open Innovation Platform Ecosystem Forum
- Analog Bits to Demonstrate New High Performance and Ultra-Low Power SERDES IP at TSMC Open Innovation Platform Ecosystem Forum
- Analog Bits to present half-power, multi-protocol SERDES at TSMC Open Innovation Platform Ecosystem Forum
- Synopsys Receives Customers' Choice Award for Paper Presented at TSMC 2020 Open Innovation Platform Ecosystem Forum
- Analog Bits to Present Papers on Wafer-Scale Sensors and PCIe Clock Systems at TSMC 2020 Open Innovation Platform Ecosystem Forums
Breaking News
- Alphawave IP and Verisilicon Expand Partnership with $54M Multi-Year Exclusive Subscription Reseller Agreement for China Market
- BrainChip Inc. and NaNose Medical Successfully Detect COVID-19 in Exhaled Breath with Fast High-Accuracy Results
- TSMC Ranks in Top-10 For Capacity in Three Wafer Size Categories
- Palma Ceia SemiDesign Announces Nicky Wilkinson as Director IC Engineering
- Rambus and AMD Extend Patent License Agreement
Most Popular
- TSMC Ranks in Top-10 For Capacity in Three Wafer Size Categories
- CEVA's MotionEngine Smart TV Software Comes to More Smart TV brands via LG webOS
- North American Semiconductor Equipment Industry Posts January 2021 Billings, Topping $3 Billion for First Time
- Andes Technology and Rambus Collaborate to offer Secure Solution for MCU and IoT Applications
- SiPearl and Open-Silicon Research Collaborate to Accelerate Custom Silicon for High Performance Computing (HPC) Applications
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |