ARM Fellow Surveys Moore's Law
Researcher remains upbeat despite challenges
Rick Merritt, EETimes
10/27/2016 02:00 AM EDT
SANTA CLARA, Calif. — Chip makers used to laugh at Greg Yeric’s idea for boosting Moore’s law. It was too difficult and risky. Now they’re researching it.
The experience of the ARM fellow is another sign that engineers are leaving no stone unturned in their efforts to keep making smaller, faster chips. Yeric expressed optimism for several more generations of semiconductors although he was frank about the challenges ahead, speaking in an interview after a keynote talk at the ARM Tech Con here.
Traditional cost reductions are coming more slowly as power savings and performance increases become harder to find, Yeric said in his talk. Engineers need to scan a wide field of new materials and processes and manage an increasing pace of change affecting the whole supply chain, he said.
E-mail This Article | Printer-Friendly Page |
Related News
Breaking News
- PUFsecurity Unveils Next-Gen Crypto Coprocessor PUFcc7 Featuring High-speed Performance and TLS 1.3 Support
- VeriSilicon's complete Bluetooth Low Energy IP solution is fully compliant with LE Audio specification
- TASKING and Andes Announce FuSa Compliant Compiler Support for Andes RISC-V ASIL Compliant Automotive IP
- Efabless Launches an "AI Wake Up Call" Open-Source Silicon Design Challenge
- Efinix Rolls Out Line of FPGAs to Accelerate and Adapt Automotive Designs and Applications
Most Popular
- Qualitas Semiconductor and Ambarella Sign Licensing Agreement
- ZeroPoint Technologies Signs Global Customer to Bring Hardware-Accelerated Compression to Hyperscale Data Centers
- Chiplet Interconnect Pioneer Eliyan Closes $60 Million Series B Funding Round, Co-led by Samsung Catalyst Fund and Tiger Global Management to Address Most Pressing Challenge in Development of Generative AI Chips
- Intel and Arm Team Up to Power Startups
- Alphawave Semi and InnoLight Collaborate to Demonstrate Low Latency Linear Pluggable Optics with PCIe 6.0® Subsystem Solution for High-Performance AI Infrastructure at OFC 2024