Grenoble, France - October 31, 2016 -- Low-power SoCs rely on two design techniques, namely multiple operating frequencies and supply voltages to minimize dynamic power and coarse grain power gating by shutting down parts in sleep mode to save a large amount of leakage power (e.g. up to 99% saving).
The implementation of such design techniques requires the insertion of specific cells (power switch cells, isolation cells, level shifters…) at the appropriate places and in the appropriate manner for the design to achieve its minimum power with the highest reliability. Indeed, further power savings come at the expense of implementation complexity and thus of higher risk of malfunction.
CLICK, an SoC Fabric IP from Dolphin Integration, is a universal power gating solution which enables designers to easily and safely implement power gating. Promoting a ring-style implementation, CLICK is a library-independent solution which solves by construction the design issues left up to the designer with traditional solutions (PMK, POK…). CLICK is applicable to any power domain requiring power gating whatever its nature, whether a logic block or hard macro.
With its patented cell, the Transition Ramp Controller (TRC), CLICK automatically limits the inrush current, controls the resulting IR-drop and optimizes the wake-up time of the power domain. Thanks to the register programmability of the TRC, the maximum inrush current allowed at wake-up time can be easily tuned, even after tape-out (!), whereas traditional daisy chains provide neither the same flexibility nor the safety of a control scheme.
Voltage drop at regulator output for different TRC settings - TAISHAN project
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Finally, CLICK is fully compatible with the DELTA voltage regulator library and its MAESTRO embedded control network for the design and implementation of low-power SoCs.
Note: CLICK is fully compatible with both Cadence and Synopsys Place and Route solutions.
About Dolphin Integration
Dolphin Integration contributes to "enabling low-power Systems-on-Chip" for worldwide customers - up to the major actors of the semiconductor industry - with high-density Silicon IP components best at low-power consumption.
"Foundation IPs" includes innovative libraries of standard cells, register files and memory generators as well as an ultra-low power cache controller. "Fabric IPs" of voltage regulators, Power Island Construction Kit and their control network MAESTRO enable to safely implement low-power SoCs with the smallest silicon area. They also star the "Feature IP": from ultra-low power Voice Activity Detector with high-resolution converters for audio and measurement applications to power-optimized 8 or 16 and 32 bit micro-controllers.
Over 30 years of experience in the integration of silicon IP components, providing services for ASIC/SoC design and fabrication with its own EDA solutions, make DOLPHIN Integration a genuine one-stop shop addressing all customers' needs for specific requests.
It is not just one more supplier of Technology, but the provider of the DOLPHIN Integration know-how!