eSilicon enables high-speed networking and communications and high-performance computing with complete IP platform and 2.5D implementation
SAN JOSE, Calif. — March 22, 2017 — eSilicon Corporation, a leading independent semiconductor design and manufacturing solutions provider, today announced the successful tapeout for production of a customer ASIC with eSilicon® eFlexCAM™ TCAMs, eFlex™ embedded memories, extended-voltage-range general-purpose I/O (EVGPIO) and high-bandwidth memory (HBM2) PHY for Samsung's 14LPP process technology. The tapeout marks a significant milestone in eSilicon’s enablement of high-performance networking and communication chips in Samsung FinFET technology.
The 14LPP custom ASIC chip includes a silicon interposer, 28G SerDes, a high-bandwidth memory (HBM2), with five different types of custom memories, HBM Gen2 PHY, interposer design and a custom flip-chip package which is based on Samsung’s I-CubeTM solution. I-Cube is Samsung’s full 2.5D turnkey solution, which connects a logic chip and HBM2 memory with an interposer.
“This successful 14nm network processor tape-out was combined with eSilicon’s proven design ability in network area and Rambus’ expertise in SerDes and Samsung’s robust process technology along with I-Cube solution.” said Ryan Lee, Vice President of Foundry Marketing Team at Samsung Electronics. “Our collaboration model will have a great influence on a network foundry segment and Samsung will keep developing its network foundry solution to be a meaningful total network solution provider aligned with its process roadmap from 14nm and 10nm to 7nm.”
“eSilicon is proud to deliver a complete 14LPP IP platform for high-bandwidth, high-performance computing,” said Patrick Soheili, vice president of product management and corporate development at eSilicon. “Working with Samsung at 14LPP, and beginning to work in 10LPP, allows us to build on our past success in HBM2, 2.5D and specialty memories at advanced nodes. This is one of the world’s first production tapeouts of a 2.5D ASIC.”
- Successful 2.5D ASIC production tapeout of networking and computing chip based on eSilicon's silicon-proven Samsung 14LPP IP platform
- eSilicon’s end-to-end 2.5D/HBM2 solution includes 2.5D ecosystem management, HBM2 PHY, ASIC design, 2.5D package design, manufacturing, assembly and test
- Memory IP customization for optimal power, performance, and area
- Overdrive and super overdrive support speeds beyond 2.5GHz targeted to high-bandwidth, high-performance networking and computing applications
The 14LPP IP platform is available now. The platform includes the following IP:
- High-speed and ultra-high-speed single-port ternary CAM compiler (SP TCAM)
- High-speed dual-port (DP) SRAM compiler
- High-speed single-port fast cache (SP FC) compiler
- High-density two-port asynchronous register file (2PARF) compiler
- Innovative memory architectures for packet buffers
- 1.8V oxide 1.8V/2.5V/3.3V general-purpose I/O library
- 1.8V oxide 1.8V LVDSOUT I/O library
- 1024 bit HBM2 PHY
Contact eSilicon at firstname.lastname@example.org for more information, silicon quality results, white papers or data sheets.
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