GTsmooth high performance metal-fill enable designers to integrate CMP (Chemical Mechanical Polishing) effects in their design process
Grenoble, France – 11 November 2002 - XYALIS, the leading provider of layout finishing tools, today announces GTsmooth, the first hybrid metal-fill tool, which combines the benefits of rules- and model-based methods to increase the manufacturing yield of chips and wafers, to limit the parasitic effects due to dummy insertion, while keeping lowest processing time and database size.
With ever shrinking geometries, chip designers must now take manufacturability into account during design. Advanced manufacturing techniques require a uniform repartition of patterns to increase factory yield. A non-uniform feature density causes Chemical-Mechanical Polishing (CMP) to over-polish empty areas while under-polishing dense areas. This impacts manufacturability and degrades the chip performance. To minimize the impact of CMP modern foundry rules specify layout density bounds and dummy tiles must be inserted in empty areas as early as possible.
"Today we face major manufacturability issues, such as CMP and we need efficient tools to be introduced in the early stages of the design flow", says Herve Jaouen, TCAD Manager at ST Microelectronics.
Rules-based metal-fill tools, also called dummy tile insertion tools, compute empty areas according to design rules and do not take into account the actual density variation over the chip. They fill all empty areas with dummy tiles in a uniform way. Computation is fast but too many tiles are inserted, modifying the parasitic capacitance of the chip and leading to performance degradation. Model-based metal-fill tools simulate the effect of CMP on a particular process, calculate thickness variation over the chip, and accordingly determine areas where dummy tiles must be added to even thickness. Insertion is accurate with a minimum number of inserted tiles to limit parasitic capacitance variation and lead to maximum yield improvement. But performance is slow and the non-regular nature of tile insertion leads to huge databases, impractical for large chips and wafers. Since these solutions are foundry dependent, model-based tools are limited to a small number of processes.
GTsmooth combines rules- and model-based approaches for smartest and fastest metal-fill
XYALIS introduces today GTsmooth, the first hybrid metal-fill tool, to address the CMP challenge. GTsmooth uses a model-based approach to identify where dummies must be inserted and follows a rules-based approach to determine how to insert dummies, to minimize thickness variation over chips and wafers,limit CMP effects, and increase factory yield.
To determine areas where dummy tiles need to be inserted, GTsmooth evaluates the thickness variation over the chip with a proprietary post-CMP thickness estimator, which results from XYALIS' years of experience in the CMP domain. But GTsmooth approach is highly flexible and supports any process, since users may plug-in their own post-CMP thickness estimation function, based on the foundry expertise.
To limit the number of added dummies, reduce the parasitic capacitance variation, and minimize performance degradation, XYALIS has implemented a patented algorithm for metal-fill. It makes sure that a minimum number of dummies are added, only where needed. GTsmooth inserts up to 95% less tiles than rules-based tools for maximum yield improvement.
And since GTsmooth inserts a small number of tiles, regularly spaced, the computation time is fast without database explosion, enabling designers to insert dummy tiles early in the design process and take their parasitic effects into account during timing verification.
A last dummy tile insertion step is usually required at wafer level just prior to manufacturing after the process engineer adds test and alignment features to sawing lines. This last modification to the layout breaks the regularity and dramatically increases the size of the wafer-level database. XYALIS' optimizations in terms of computation time, memory and disk usage allow GTsmooth to handle such wafer-level dummy tile insertions.
Availability of GTsmooth
GTsmooth will be available in Q4 2002. It consists of a complete environment and comes with all modules needed for efficient metal-fill: a proprietary and customizable thickness variation estimator, a graphical environment to view, in 2D and 3D, density and thickness over the chip, an intuitive Graphical User Interface, as well as utilities to verify the integrity of the input GDSII layouts and to generate a final GDSII database.
Founded in 1998, XYALIS develops and markets proprietary technology, software tools, and services, which enable the semiconductor industry to reduce the time to manufacturing. XYALIS' tools are designed to be extremely high performance and handle very complex IC designs. XYALIS' products are used to substantially increase engineering productivity during tape-out and first time silicon success. For more information, visit the XYALIS web site at http://www.xyalis.com or send email to email@example.com.