Reference Flow for Silicon-Proven Design Platform Accelerates Path to Lower Power and Design Cost
MOUNTAIN VIEW, Calif. -- Sept. 25, 2017 -- Synopsys, Inc. (NASDAQ: SNPS) today announced that the Synopsys Design Platform has been fully certified for use on Samsung Foundry's 28FDS (FD-SOI) process technology. A Process Design Kit (PDK) and a comprehensive reference flow, compatible with Synopsys' Lynx Design System, containing scripts, design methodologies and best practices is now available. For Samsung Foundry's latest differentiated process offering, support for bias throughout the Design Platform flow has been thoroughly verified and certified to achieve optimal power and performance tradeoffs.
"FD-SOI technology offers one of the best power, performance, and cost tradeoffs," said Jaehong Park, senior vice president of the Foundry Solutions Team at Samsung Electronics. "Samsung Foundry's 28FD-SOI technology allows designs to operate both at high and low voltage making it ideal for IoT and mobile applications. Moreover, the FD-SOI technology exhibits the best soft error immunity, and, therefore, is well suited for applications that require high reliability such as automotive. Availability of certified Synopsys Design Platform, PDK and reference flow will allow our mutual customers to accelerate adoption of our 28FDS technology."
"Our long standing, close collaboration with Samsung Foundry starts very early, allowing Synopsys to refine tools and flows enabling customers to achieve desired performance and power targets," said Michael Jackson, corporate vice president of marketing and business development for the Design Group at Synopsys. "Certification of the Synopsys Design Platform, complete with PDK and reference flow helps our mutual customers to rapidly design with confidence for Samsung Foundry's 28-nm FD-SOI process."
Key Synopsys tools certified by Samsung Foundry include:
- IC Compiler™ II place and route: Multibit register optimization, low-power placement and advanced design planning for optimized module placement and timing
- Design Compiler® Graphical RTL synthesis: Correlation, congestion reduction, and physical guidance for IC Compiler II
- DFTMAX™ and TetraMAX® test solutions: Simultaneously meet design and test goals while addressing ISO 26262 automotive test requirements, achieving accurate silicon diagnosis and quickly ramping yield
- PrimeTime® timing signoff: Ultra-low voltage timing signoff with Advanced Waveform Propagation (AWP) and placement rule-aware Engineering Change Order (ECO) guidance
- IC Validator signoff physical verification: Automated DRC repair, DFM pattern matching and metal fill In-Design with IC Compiler II; DRC and LVS with Custom Compiler™ full-custom solution
- StarRC™ extraction: Multi-rail signoff with support for multi-valued standard parasitic exchange format (SPEF)
- Custom Compiler full-custom solution: Features the pioneering visually-assisted automation flow to speed up common design tasks, reduce iterations and enable reuse.
- HSPICE® simulation: Gold standard for accurate circuit simulation
- Reference flow is available now through Samsung Foundry
Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software™ partner for innovative companies developing the electronic products and software applications we rely on every day. As the world's 15th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP, and is also growing its leadership in software security and quality solutions. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest security and quality, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at www.synopsys.com.