Update: Cadence Completes Acquisition of Tensilica (Apr 24, 2013)
Patented Technology is Key To Overcoming SOC Design Challenges
SANTA CLARA, Calif., November 11, 2002 – Tensilica® Inc., the leading supplier of configurable and extensible microprocessor cores, today announced it has been granted two U.S. patents. U.S. Patent No. 6,477,683 protects the fundamental concept of generating application-specific processor hardware and software together. U.S. Patent No. 6,477,697 covers major features of the Tensilica Instruction Extension (TIE) language, which is used to extend the capabilities of Tensilica's Xtensa® processor. The technology covered by these patents allows embedded designers to overcome the traditional challenges associated with system-on-chip (SOC) design.
"These two patents cover very important technology innovations that Tensilica currently brings to the marketplace," said Chris Rowen, president and CEO of Tensilica. "The potential value of configurable processors is now widely accepted, but SOC designers get the performance and productivity benefits only if the hardware and software are guaranteed to work together. These patents recognize Tensilica's technology lead and make us the only company legally entitled to deliver these capabilities to the industry."
Work on these new patents has been underway for almost five years. "We're particularly pleased with the broad language allowed by the US Patent and Trademark Office even after examination of prior art," Rowen added.
Tensilica's new patent, U.S. Patent No. 6,477,683, is titled, "Automated processor generation system for designing a configurable processor and method for the same." The patent covers systems that can generate both hardware and software components for a processor. An important part of the patent covers the ability to allow the designer to customize a processor configuration by adding new instructions or execution units and, within minutes, evaluate the new features that were added.
Tensilica's second new patent, U.S. Patent No. 6,477,697, is titled, "Adding complex instruction extensions defined in a standardized language to a microprocessor design to produce a configurable definition of a target instruction set, an HDL description of circuitry necessary to implement the instruction set, and development and verification tools for the instruction set." The patent covers major features of the TIE language, which is used to extend the processor's instruction set for optimum performance and functionality.
The growing demand for application-specific SOCs in thousands of embedded applications has prompted leading suppliers of microprocessor cores to introduce new products that support configurability and extensibility – the process of extending the processor by adding custom, designer-defined instructions or execution units. These products, however, require designers to manually adjust compilers, assemblers, debuggers, operating systems, instruction set simulators, co-verification models and EDA implementation scripts when hardware changes are made to the processor RTL, significantly increasing design time and risk. The Xtensa Processor Generator lets designers overcome these challenges by automatically generating the processor's hardware implementation and software development tools simultaneously, even in cases where designer-defined instructions are added using the TIE language.
Licensed by over 50 of the industry's leading semiconductor and systems companies, Tensilica's Xtensa microprocessor technology is enabling designers to deliver a wide variety of optimized SOCs for applications ranging from low-cost, low-power consumer electronics devices to high performance, multi-processor communications systems. Unlike traditional rigid microprocessor architectures that must be coupled with custom logic in order to provide the required performance for a particular application, the Xtensa architecture allows customers to add their own differentiated, designer-defined instructions or execution units directly to the processor.
The Xtensa configurable and extensible microprocessor architecture provides a powerful, integrated hardware and software development environment with thousands of configuration options and an unlimited range of customer-specific extensions. The environment enables designers to carefully tune the processor for their particular application. With an easy-to-use graphical interface, designers can take advantage of Tensilica's processor generator to create customized MPU solutions with specialized functions and instructions. Because these instructions are recognized as "native" by a complete set of software development tools, developers can simultaneously tune both application software and processor hardware to meet specific speed, power and feature goals.
Tensilica was founded in July 1997 to address the growing need for optimized, application-specific microprocessor solutions in high-volume embedded applications. With a configurable and extensible microprocessor core called Xtensa, Tensilica is the only company that has automated the time-consuming process of generating a customized microprocessor core along with a complete software development tool environment, producing new configurations in a matter of hours. For more information, visit www.tensilica.com.
- "Tensilica" and "Xtensa" are registered trademarks belonging to Tensilica Inc. All other trademarks are the property of their respective holders.
- Tensilica's announced licensees are Agilent, Astute Networks, Avision, Bay Microsystems, Berkeley Wireless Research Center, Broadcom, Cisco Systems, Conexant Systems, Cypress, ETRI, FUJIFILM Microdevices, Fujitsu Ltd., Hudson Soft, Hughes Network Systems, IC4IC, Ikanos Communications, JNI Corporation, Marvell, Mindspeed Technologies, National Semiconductor, NEC Networks, NEC Solutions, Nippon Telephone and Telegraph (NTT), Olympus Optical Co. Ltd., ONEX Communications, OptiX Networks, Osaka & Kyoto Universities, Sony, TranSwitch Corporation, Trebia Networks, Victor Company of Japan (JVC) and ZiLOG.