NetSpeed's Turing Brings Machine Learning to SoC Design

San Jose, Calif., October 5, 2017—NetSpeed Systems Inc., announced today the release of Turing, a solution for optimizing SoC interconnects that uses supervised learning to explore patterns in interconnect design data to home in on promising strategies quickly. Turing is the underlying cognitive engine that drives NetSpeed’s intelligent interconnect IP, tools and architecture framework and is targeted for addressing the needs of next-generation SoCs for cloud computing, automotive, mobile and IoT applications.

"A new class of intelligent and autonomous applications is emerging, which includes autonomous vehicles, and even the fastest CPUs cannot meet the intensive processing demands," said Linley Gwennap, principal analyst at the Linley Group. "In many cases, OEMs are developing their own high-performance ASICs that blend a mix of CPU cores, computing clusters, GPUs and other computing resources and specialized accelerators. NetSpeed has taken an innovative approach to SoC design that uses machine learning technology to assist system architects in creating optimized designs that maximize the performance of heterogeneous multicore system-on-chip (SoC) for these next-generation applications. NetSpeed’s Turing is like having a guru architect on call to provide design advice. Processor architects can take Turing’s advice and then devote their time to solving the other hard problems in their SoC design."

"SoC architects are now faced with an almost impossible task," said Fred Weber, NetSpeed board member and industry luminary. "Due to the complexity of interactions among various components on today's heterogeneous SoCs, the design solution space is astronomically large. It takes a breakthrough technology like NetSpeed's Turing that automates the process and applies machine learning to find the optimal solution, one that is functionally and performance correct for all use cases."

“We are pushing the boundary of what is possible to do with SoC design and architecture,” said Sundari Mitra, CEO and co-founder of NetSpeed Systems. “Turing, through the use of machine learning technology, is enabling a new crop of architectures and designs that deliver the unprecedented system performance and power efficiency necessary for today’s cutting-edge applications.”

Traditionally, architects have designed interconnects relying on their experience and making key design decisions such as choice of topology and routing based on gut feeling. However, this approach does not scale for heterogeneous systems where on-chip requirements are extremely diverse.

Instead, NetSpeed uses a requirements-driven design flow where architects specify IP blocks, their basic connectivity, performance requirements, and system-centric use cases. Turing then uses machine learning to find optimum solutions. Each use case is evaluated for performance, power, area (PPA), FuSa requirements, and an interconnect implementation is suggested. Architects can review automatically generated results and fine-tune their implementations accordingly.

About NetSpeed Systems

NetSpeed Systems provides scalable, coherent on-chip network IPs to SoC designers for a wide range of markets from mobile to high-performance computing and networking. NetSpeed's on-chip network platform delivers significant time-to-market advantages through a system-level approach, a high level of user-driven automation and state-of-the-art algorithms. NetSpeed Systems was founded in 2011 and is led by seasoned executives from the semiconductor and networking industries. The company is funded by top-tier investors from Silicon Valley. It is based in San Jose, California and has additional research and development facilities in Asia. For more information, visit www.netspeedsystems.com.

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