USB V3.1 Power Delivery Type-C Port Evaluation board for OTI9108 IP
SiFive Joins TSMC IP Alliance Program
Addition of Coreplex IP to TSMC IP portfolio speeds time to market and marks a significant milestone for the growing RISC-V ecosystem
SAN MATEO, Calif., Sept. 26, 2017 -- SiFive, the first fabless provider of customized, open-source-enabled semiconductors, today announced it has joined the TSMC (NYSE: TSM) IP Alliance Program, part of the TSMC Open Innovation Platform®, which accelerates innovation in the semiconductor design community. As an alliance member, SiFive's RISC-V based Coreplex IP are made available to its customers to reduce time-to-market, increase return on investment and reduce waste in the manufacturing process.
Ad |
RISC-V Processor - RV12 - 32/64 bit, Single Core CPU Compact Implementation of the RISC-V RV32IMC ISA |
With the significant increases in non-recurring engineering and design costs required to bring to life new silicon designs, TSMC's IP Alliance Program makes it easier for fabless chipmakers to innovate and produce custom semiconductors. By participating in the TSMC IP Alliance Program, SiFive becomes the first RISC-V solution provider to make its IP readily available for fabless chipmakers leveraging the industry's most comprehensive semiconductor IP portfolio.
"Acceptance into the TSMC IP Alliance is an honor and a significant validation not only of SiFive, but of the RISC-V architecture as a whole," said Jack Kang, vice president of Product and Business Development, SiFive. "Having the SiFive Coreplex IP platform available through the program makes designing a chip based on the latest in open source hardware even easier. We look forward to continued collaboration with TSMC and the other members of the IP Alliance ecosystem."
"The TSMC Open Innovation Platform forms the center of our open innovation model that addresses the needs of our customers looking to reduce design time and speed time-to-market," said Suk Lee, TSMC senior director, Design Infrastructure Marketing Division. "The addition of SiFive's IP to the TSMC IP catalog will streamline the process of fabricating custom silicon designs based on the RISC-V implementation."
SiFive was founded by the inventors of RISC-V – Andrew Waterman, Yunsup Lee and Krste Asanovic – with a mission to democratize access to custom silicon. In its first six months of availability, more than 1,000 HiFive1 software development boards have been purchased and delivered to developers in over 40 countries. Additionally, the company has engaged with multiple customers across its IP and SoC products, started shipping the industry's first RISC-V SoC in November 2016 and announced the availability of its Coreplex RISC-V based IP earlier this year. SiFive's innovative "study, evaluate, buy" licensing model dramatically simplifies the IP licensing process, and removes traditional road blocks that have limited access to customized, leading edge silicon.
About SiFive
SiFive is the first fabless provider of customized semiconductors based on the free and open RISC-V instruction set architecture. Founded by RISC-V inventors Yunsup Lee, Andrew Waterman and Krste Asanovic, SiFive democratizes access to custom silicon by helping system designers reduce time-to-market and realize cost savings with customized RISC-V based semiconductors. SiFive is located in Silicon Valley and has venture backing from Sutter Hill Ventures, Spark Capital and Osage University Partners. For more information, visit www.sifive.com.
|
Related News
Breaking News
- Cadence Announces Most Comprehensive True Hybrid Cloud Solution to Provide Seamless Data Access and Management
- Dolphin Design expands GoAsic partnership to enhance the semiconductor Industry's Supply Chain
- Cadence Collaborates with MemVerge to Increase Resiliency and Cost-Optimization of Long-Running High-Memory EDA Jobs on AWS Spot Instances
- M31 Successfully Validates 5nm IP Solution to Empower Global AI Applications
- Cadence Unveils Palladium Z3 and Protium X3 Systems to Usher in a New Era of Accelerated Verification, Software Development and Digital Twins
Most Popular
- Rivos Raises More Than $250M Targeting Data Analytics and Generative AI Markets
- Semiconductor Capacity Is Up, But Mind the Talent Gap
- Zhuhai Chuangfeixin: OTP IP Based on 90nm CMOS Image Sensor Process Technology Successfully Mass Production
- CMC Microsystems and AIoT Canada Sign Memorandum of Understanding to support IoT and semiconductor ecosystem growth in Canada
- Microchip Technology Acquires Neuronix AI Labs
E-mail This Article | Printer-Friendly Page |