SH-5 - The Only Licensable RISC CPU to Support Software MPEG4 Codec

QCIF to VGA formats supported

San Jose, California and Bristol, UK - 18 November 2002 SuperH, Inc., the leading supplier of multimedia RISC CPU cores is demonstrating this week at the Embedded Systems Conference in Boston, (www.esconline.com/boston), an end-to-end MPEG4 codec solution running entirely in software running on its 64-bit SH-5 CPU core.

Importance of MPEG4
SuperH believes the MPEG4 standard will become widely accepted within the world of consumer electronics and that any 'connected device' from a set-top-box to a smart phone will need to be compatible with this standard. In response to this need SuperH are able to demonstrate that its SH-5, 64-bit RISC CPU core, can deliver all the major profiles from QCIF to VGA that will be required in both handheld and mains powered devices.

Rick Chapman, VP of sales and marketing at SuperH said, ''We see a huge market demand for MPEG4. Our solution delivers not just the QCIF and CIF profiles required for handheld devices but also the VGA profile that will enable us to address the desktop and TV based systems making SuperH the only licensable RISC CPU solution for this market.''

Importance of software decoding on a RISC CPU
SuperH believes that multimedia devices will be required to offer support for both multiple standards e.g. MPEG4, MP3 and G72x and downloadable applications and that a programmable platform will be essential to meet flexibility and time-to-market requirements. Hardwired solutions cannot deliver the flexibility and the only realistic solution is to offer a programmable solution. One option is to use a DSP or specialized VLIW engine coupled with a RISC CPU to offer this level of functionality. However, this requires significant design effort to couple together the two processing cores and their memory systems. Furthermore this type of system requires porting and support of operating systems to both cores which are often licensed from different suppliers.

The SuperH solution is to deliver this functionality on a single RISC CPU that can run any of the industry standard operating systems such as Linux or WindowsCE.net. This offers two clear benefits:

• The CPU can be used to run general purpose applications as well as DSP intensive tasks such as MPEG4 thereby removing the need to design a system with both a CPU and DSP/VLIW engine. This will deliver both cost and time to market benefits in having a single architecture with a single memory system and single software base.
  

• Time to market for software development is minimized since the software development tools for established RISC processors such as SuperH are much more mature and widely available than those for specialized DSP or VLIW architectures.

The SH-5 MPEG4 results
The MPEG4 results were based on the publicly available Xvid codec software (see www.xvid.org). This software is distributed under the GNU public license and was optimized by engineers at SuperH using the SHmedia SIMD instruction set which is at the heart of the SH-5 CPU core.

The table below shows the clock speed required to run the MPEG4 video codec at the various profiles. Showing the data in this format enables licensees to determine the clock speed of the system required to execute the relevant MPEG4 codec.

MPEG4 Results on SH-5 CPU Core
Screen:	QCIF	CIF	VGA
Image bit rate:	64kbs	384kbps	1mbps
MHz required for 15 fps decode	5.9	47	97
MHz required for 25 fps decode	9.8	78	162
MHz required for 15 fps encode	18.3	88	239
MHz required for 15 fps encode	30.5	146	398

This demonstrates the suitability for the SH-5 in real applications, for example:

1. A video system required to run a CIF, 384kbps, 15fps codec can be executed in 135MHz.
2. A video phone requires both audio and video decode and overhead for system management. The SH-5 process an audio codec such as a G.723.1 speech, 1-Channel full duplex @ 5.3 Kbps in under 40MHz and therefore can deliver an entire 15fps, QCIF video phone in ~70MHz.

Further optimizations could be realized through the use of proprietary MPEG4 codecs that use more efficient algorithms than those used in the Xvid public sources and SuperH is actively engaged with 3rd parties through its extensive partner program (see www.superh-partners.com) to deliver solutions in this market area.

SIMD is the secret of success
The SH-5 can achieve this level of efficiency because of the rich SIMD SHmedia instruction set targeted at multimedia applications. One of the key objectives of the SH-5 development was to produce an efficient instruction set architecture that delivers as many operations per cycle as possible in order to minimize the clock frequency and hence reduce both power consumption and cost. SHmedia includes for example the SAD (sum of absolute differences) instruction which is a key calculation used in motion estimation algorithms for video processing and delivers 24 operations per cycle. Motion estimation is one of the most important areas for optimizing video codecs and the SAD instruction enables developers to differentiate their codecs in this area.

As an example of the processing being handled by the SH-5 CPU core, the 25fps CIF stream requires the following MOPS:

• Decode of a CIF 25fps image on the SH-5 CPU core completes in 77.7MHz and executes 151MOPs
• Encode of a CIF 25fps image on the SH-5 CPU core completes in 146.1MHz and executes 480MOPs

At the ESC show SuperH will be demonstrating CIF and QCIF video decode and conferencing solutions on its SH-5 based MPEG4 platform together with MP3 audio support.

Photographs of the SH-5 MPEG4 demo are available for download from the News Room at www.superh.com

About SuperH, Inc.
SuperH, Inc. is semiconductor intellectual property (SIP) licensing company and is a leading supplier of multimedia RISC CPU cores to companies building system-on-chip (SoC) products.

SuperH, Inc. develops RISC CPU cores, the SuperHyway on-chip interconnect and software development tools. The SuperH™ family today includes the 32-bit SH-4 and 64-bit SH-5 CPU cores and is ideally suited to multimedia applications that require a single CPU core executing a mix of general purpose code and DSP algorithms. SuperH CPU cores are targeted at consumer, automotive, telecom and handheld multimedia appliance markets with specific emphasis on set top box, residential gateway, car information systems, modems, digital camera and multimedia players.

Further information about SuperH, Inc. and SuperH™ products can be found at www.superh.com

SuperH™ is a trademark for products originally developed by Hitachi, Ltd. and is owned by Hitachi Ltd.
The names of actual companies and products mentioned herein may be the trademarks of their respective owners.