Foundry licenses MoSys' 1T-SRAM technology for four process generations
SUNNYVALE, California, and HSINCHU, Taiwan-November 18, 2002-UMC (NYSE: UMC), a world leading semiconductor foundry and MoSys, Inc (NASDAQ: MOSY) the industry's leading provider of high density SoC embedded memory solutions, today announced that UMC has licensed MoSys' 1T-SRAM® technology as part of the foundry's enhanced IP strategy to offer SoC designers memories that are more tightly aligned with its processes. Through this licensing agreement, UMC can now provide customers with direct access to one of the most popular forms of memory, 1T-SRAM, in its 0.18, 0.15 and 0.13 micron, and 90 nanometer standard logic processes. UMC's access to this technology allows the foundry to provide its own customized versions of derivative, ultra-high density, 1T-SRAM memories.
Dr. C. T. Lee, vice president of corporate marketing at UMC said, "Memory is vital to the success of all designs, and it is becoming increasingly more important as it is dominating more than 50 percent of the die area in many upcoming SoCs. As such, we want to provide memory macros that are linked as tightly as possible to our process technologies, and those we can customize. Besides 6T (six transistor) and trench memories, we chose 1T-SRAM memories as alternative memories because they fit into certain application areas. And, we decided to align with MoSys as it is one of the leading vendors of 1T-SRAM technology."
"As UMC is one of the world's leading foundries, we are very enthusiastic that it is adopting our technology for generating memories for its customers," commented Mark-Eric Jones, vice president and general manager of intellectual property at MoSys. "The agreement allows UMC to provide design services and support to its customers directly, while preserving continuity and stability of business arrangements between MoSys and its licensees. In addition, it furthers the proliferation of MoSys' 1T-SRAM embedded memory technology, including our low standby power 1T-SRAM-M™ technology and our new 1T-SRAM-R™ offering that incorporates Transparent Error Correction™ (TEC™) to eliminate the need for redundancy and laser repair while improving yield, reliability and soft error rates. Our macros will be more adoptable by a broader audience of UMC customers as the foundry will help accelerate availability on its specific process technologies."
Lee continued, "Many of our customers have stated that they would like UMC to offer its own family of embedded memory cores, as memory is becoming so important for future SoC designs. Through this new agreement we will provide customers the option of accessing process-aligned MoSys 1T-SRAM technology directly through UMC."
Prior to this agreement, MoSys was already working with UMC by offering a range of Standard 1T-SRAM memory macros that had been verified on UMC's 0.18 micron and 0.15 micron standard logic processes. These cores, available through MoSys, were promoted to customers through UMC's Gold IP program.
The new customized 1T-SRAM cores under this agreement will be sold and marketed by UMC. UMC's roadmap is to offer process-proven 0.18 micron and 0.15 micron 1T-SRAM cores to customers in Q1 2003, 0.13 micron cores in Q2 2003; and 90 nanometer cores in the second half of 2003. Pricing is available upon request.
About 1T-SRAM Technology
Since MoSys first made its 1T-SRAM memory technology available for license, MoSys' licensees have now shipped a total of more than 45 million chips incorporating 1T-SRAM embedded memory technology, demonstrating the excellent manufacturability of the technology in a wide range of silicon processes and applications.
Founded in 1991, MoSys (NASDAQ: MOSY), develops, licenses and markets innovative memory technologies for semiconductors. MoSys' patented 1T-SRAM technologies offer a combination of high density, low power consumption, high speed and low cost unmatched by other available memory technologies. The single transistor bit cell used in 1T-SRAM technology results in the technology achieving much higher density than traditional four or six transistor SRAMs while using the same standard logic manufacturing processes. 1T-SRAM technologies also offer the familiar, refresh-free interface and high performance for random address access cycles associated with traditional SRAMs. In addition, this technology can reduce operating power consumption by a factor of four compared with traditional SRAM technology, contributing to making it an ideal technology for embedding large memories in System on Chip (SoC) designs. 1T-SRAM technologies are in volume production both in SoC products at MoSys' licensees as well as in MoSys' standalone memories. MoSys is headquartered at 1020 Stewart Drive, Sunnyvale, California 94085. More information is available on MoSys' website at http://www.mosys.com.
Note From UMC Concerning Forward-Looking Statements
Some of the statements in the foregoing announcement are forward looking within the meaning of the U.S. Federal Securities laws, including statements about future outsourcing, wafer capacity, technologies, business relationships and market conditions. Investors are cautioned that actual events and results could differ materially from these statements as a result of a variety of factors, including conditions in the overall semiconductor market and economy; acceptance and demand for products from UMC; and technological and development risks.
1T-SRAM® is a MoSys trademark registered in the U.S. Patent and Trademark Office. All other trade, product, or service names referenced in this release may be trademarks or registered trademarks of their respective holders.