Rick Merritt, EETimes
1/31/2018 02:51 PM EST
SANTA CLARA, Calif. — Vendors and researchers are making significant progress applying machine learning to the thorny issues of chip design, according to a panel at DesignCon here. The use of AI in EDA was a hot topic that drew a standing-room-only crowd to the panel and spawned several papers at the event.
Over the past year, the Center for Advanced Electronics through Machine Learning (CAEML) has gained four new partners. The team of 13 industry members and three universities has expanded both the breadth and depth of its work.
“Last year, we focused mainly on signal integrity and power integrity, but this year, we diversified our portfolio into system analysis, chip layout, and trusted platform design — so the diversity of the research has made the most progress,” said Christopher Cheng, a distinguished technologist at Hewlett-Packard Enterprise and a member of CAEML.
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