DesignWare IP in Advanced FinFET Process Technologies Doubles the Bandwidth and Lowers Power Consumption by 30 Percent
MOUNTAIN VIEW, Calif. -- Feb. 26, 2018 -- Synopsys, Inc. (Nasdaq: SNPS) today announced the availability of the industry's first complete Universal Flash Storage (UFS) IP solution, compliant with the latest JEDEC UFS v3.0 standard. The high-throughput, low-latency DesignWare® UFS 3.0 IP solution doubles the bandwidth to 11.6 Gbps per lane for a faster interface between SoCs and storage ICs, compared to UFS 2.1. The power-efficient MIPI M-PHY delivers less than 3.5 mW/Gbps per lane by supporting a range of burst modes and power management modes with fast recovery time. In addition, the UFS 3.0 host controller's inline encryption and decryption engine allows secure data exchange to the storage device. Designers can accelerate software development and conduct interoperability testing prior to silicon with the DesignWare IP Prototyping Kit. By providing a complete UFS 3.0 IP solution, Synopsys enables designers to efficiently integrate the necessary functionality into applications requiring embedded and removable storage.
"Implementing the latest UFS 3.0 interface with MIPI M-PHY v4.1 for the physical layer and the new UniPro v1.8 for the link layer enables designers to achieve the best performance and power efficiency for their flash storage SoCs," said Joel Huloux, chairman of the MIPI Alliance board of directors. "As an active member of MIPI working groups and the board of directors, Synopsys has been a strong partner in driving the adoption of MIPI standards to enable a wide variety of mobile and mobile-influenced applications."
"Consumers expect fast access to gigabytes of secure data without significantly impacting their device battery power," said John Koeter, vice president of marketing for IP at Synopsys. "By providing a complete and compliant DesignWare UFS 3.0 IP solution for flash storage, Synopsys enables designers to meet the power, performance, and security requirements of their advanced SoCs with significantly less risk."
Availability and Additional Resources
The DesignWare UFS 3.0 Host Controller, MIPI® UniPro® v1.8 Controller, MIPI M-PHY® v4.1 in 16-nm, 12-nm and 7-nm FinFET processes, and verification IP are available now. The DesignWare IP Prototyping Kit for UFS is scheduled to be available in Q2 2018.
For more information, visit the DesignWare Mobile Storage IP solution web page.
About DesignWare IP
Synopsys is a leading provider of high-quality, silicon-proven IP solutions for SoC designs. The broad DesignWare IP portfolio includes logic libraries, embedded memories, embedded test, analog IP, wired and wireless interface IP, security IP, embedded processors and subsystems. To accelerate prototyping, software development and integration of IP into SoCs, Synopsys' IP Accelerated initiative offers IP prototyping kits, IP software development kits and IP subsystems. Synopsys' extensive investment in IP quality, comprehensive technical support and robust IP development methodology enable designers to reduce integration risk and accelerate time-to-market. For more information on DesignWare IP, visit www.synopsys.com/designware.
Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software™ partner for innovative companies developing the electronic products and software applications we rely on every day. As the world's 15th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software security and quality solutions. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest security and quality, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at www.synopsys.com.