Partnership delivers superior reliability and ultimate densities for high-performance industrial applications using 0.13-micron standard logic process
SUNNYVALE, CALIFORNIA and TOKYO, JAPAN (November 25, 2002) –MoSys, Inc. (NASDAQ: MOSY) the leading provider of high-density SoC embedded memory solutions and Hitachi Information Technology Co., Ltd. (Hitachi-IT), a Japanese Corporation that focuses on ASIC Integrated Design Services, today announced the licensing of 1T-SRAMÒ-Rä embedded memory technology to Hitachi–IT. MoSys' patented technology will enable Hitachi-IT, to provide its customers with high quality ASICs for high-end instrumentation incorporating more than 50 Mb of embedded memory in a standard logic process. The 1T-SRAM-R technology has been proven to dramatically reduce soft error rates (SERs) to fewer than 10 FIT/Mb in 0.13-micron process technology resulting in improved system-level reliability at a low cost while still maintaining the simple, industry-standard SRAM interface.
"MoSys' 1T-SRAM-R is a valuable solution for embedding large high-performance memories economically into SoC designs," said Mr. Yoshiteru Keikoin, senior chief engineer at Hitachi-IT. "MoSys' 1T-SRAM-R technology in collaboration with our leading edge system concept, addresses our growing need for higher quality, high-performance, low-power embedded memory with the cost advantages that are necessary for today's products."
Hitachi-IT joins other announced licensees including National Semiconductor, Philips Semiconductor and Motorola's semiconductor products sector in using 1T-SRAM-R in a range of applications that require cost savings combined with the highest levels of quality and reliability. The SoC chips will be manufactured using TSMC's 0.13-micron standard logic process. Through the inclusion of patented Transparent Error Correction™ (TECÔ) technology, 1T-SRAM-R memory sets a new standard for quality of embedded memory.
"MoSys has demonstrated strong success in delivering its 1T-SRAM technology with customers having already shipped more than 45 million chips," said Mark-Eric Jones, vice president and general manager of intellectual property for MoSys. "Japan continues to be a powerful market for MoSys and its 1T-SRAM technology across a wide range of applications."
Hitachi Information Technology Co., Ltd. (Hitachi-IT) is a diversified high-tech business that develops and markets LSI, ASIC and Board design services, among others. The company employs 1,700 of people, primarily located in Nakai, Kanagawa and Ohme-Tokyo in Japan and generates about $400 million in revenue. More information is available at http://www.hitachi-it.co.jp/english/default.htm.
Founded in 1991, MoSys (NASDAQ: MOSY), develops, licenses and markets innovative memory technologies for semiconductors. MoSys' patented 1T-SRAM technologies offer a combination of high density, low power consumption, high speed and low cost unmatched by other available memory technologies. The single transistor bit cell used in 1T-SRAM technology results in the technology achieving much higher density than traditional four or six transistor SRAMs while using the same standard logic manufacturing processes. 1T-SRAM technologies also offer the familiar, refresh-free interface and high performance for random address access cycles associated with traditional SRAMs. In addition, this technology can reduce operating power consumption by a factor of four compared with traditional SRAM technology, contributing to making it an ideal technology for embedding large memories in System on Chip (SoC) designs. 1T-SRAM technology is in volume production both in SoC products at MoSys' licensees as well as in MoSys' standalone memories. MoSys is headquartered at 1020 Stewart Drive, Sunnyvale, California 94085. More information is available on MoSys' website at http://www.mosys.com.
Note for Editors:
1T-SRAM® is a MoSys trademark registered in the U.S. Patent and Trademark Office. All other trade, product, or service names referenced in this release may be trademarks or registered trademarks of their respective holders.