Dual Port Register File Compiler (1 Read-Only Port, 1 Write-Only Port)
Dolphin Integration announces the availability of its RISC-V subsystem: RV32 Tornado
Meylan, France - May 28, 2018 -- Dolphin Integration, a major leader in energy-efficient IPs, announces the availability of its RISC-V subsystem called RV32 Tornado.
This MCU subsystem has been designed to fit the IoT requirements in terms of area and low-power consumption. It is fully configurable to enable a fast design-in and fast time-to-market. The RV32 Tornado subsystem embeds:
- an adapted version of thePULP zero-riscy core from ETH-Zurich
- a typical set of peripherals: GPIO, UART, SPI, I2C, Timers and watchdog
- standard AHB/APB interfaces
- an ultra-low power cache controller
- a debug unit with JTAG interface integrating advanced features
The RISC-V subsystem comes with a powerful software development and debug tool, an IDE called SmartVisionTM. It is an open environment allowing the design of complete subsystems based on processor cores and peripherals. SmartVisionTM provides an intuitive interface as well as the necessary tools to develop and debug embedded software by simulation or by In Circuit Emulation.
For more information, please contact us at contact@dolphin.fr or on our website: www.dolpin-integration.com
About Dolphin Integration
Dolphin Integration is a pioneer in Energy-Efficient Systems-on-Chip enablement. The company serves a growing range of applications from battery-operated to line-powered. Its portfolio of more than 200 silicon IPs covering Foundation, Feature and power Fabric IPs are proven and available in multiple processes and foundries. This coherent portfolio allows to reduce SoC power consumption in sleep, triggering and active processing modes. The company is committed to its customer success through constant innovation, quality control and dedicated support. Dolphin Integration comes with 30 years experience in integration of silicon IP components leveraging power-integrity driven simulation tools to design and supply cost-effective logic and mixed-signal ASIC/SoC.
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