Semiconductor companies accelerate adoption of Arteris Network-on-Chip (NoC) interconnect IP to create more efficient autonomous driving and AI chips
CAMPBELL, Calif. — June 26, 2018 — Arteris IP, the world’s leading supplier of silicon-proven commercial network-on-chip (NoC) interconnect intellectual property (IP), today announced that 100 customers have adopted its on-chip communication technologies in a wide variety of system-on-chip (SoC) designs for automotive, consumer electronics, artificial intelligence (AI) and server markets.
The FlexNoC and Ncore cache coherent interconnect solutions from Arteris IP play a vital role in the architecture development, design, and implementation of complex heterogeneous multicore SoCs. Arteris IP is especially critical in today’s leading-edge designs, which incorporate advanced technologies like machine learning and neural networks via hardware accelerators. Customers have chosen Arteris’ on-chip interconnect IP because it:
- Allows high bandwidth and low latency communications between hardware accelerators for custom algorithm processing using end-to-end quality-of-service (QoS) mechanisms encompassing advanced memory and data flow techniques. These capabilities enable next-generation state-of-the-art “supercomputers-on-a-chip” for artificial intelligence and autonomous driving.
- Increases system functional safety and reliability with integrated reporting and data protection capabilities. These features are integrated into the interconnect technology, implementing on-chip error code correction (ECC), hardware redundancy, built-in self-test (BIST) techniques, and a safety controller. This allows autonomous driving and advanced driver assistance system (ADAS) supercomputers-on-a-chip to more easily achieve ISO 26262 functional safety specification compliance.
- Enables low power consumption by implementing advanced clock gating and power management. Use of Arteris IP interconnects reduces power consumption for chips which include multiple processing elements, easing the deployment of the most advanced SoCs in cars and mobile devices.
“We are honored to reach the 100th customer milestone while serving the world’s most demanding chip design teams as they create state-of-the-art chips for systems ranging from autonomous driving to mobile phones to neural networking processors for machine learning,” said K. Charles Janac, President and CEO of Arteris IP. “While new customers place their confidence in our interconnect IP technology, existing customers have utilized our technology over many generations of SoCs to extend their market leadership positions. Earning our 100thcustomer is a result of our substantial technology lead, unsurpassed product quality, and highly experienced global support team.”
Reaching 100 customers is a benchmark achievement that comes at an unprecedented time in chip design when supercomputer-like processing is reshaping electronics. In addition to leading chipmakers such as NXP and Samsung, and design services companies such as Renesas Electronics, leading systems companies including Mobileye and commonly-known consumer electronics companies worldwide are adopting Arteris IP in order to quickly enter new markets.
The organic growth in the number of customers is consistent with other positive developments at Arteris IP. The company recently moved to a new and larger corporate headquarters in Campbell, CA, opened an engineering facility in Austin, and doubled the size of its Paris engineering office.
Recent Arteris IP Customer Achievements
Mobileye, an Intel business, has licensed Arteris IP’s FlexNoC interconnect as well as the optional FlexNoC Physical and FlexNoC Resilience Packages for use in its EyeQ5® vision based ADAS SoCs: “For years, Arteris IP’s on-chip communication technology has allowed us to continually increase the performance of each EyeQ ADAS SoC generation while reducing wire routing congestion and timing closure issues,” said Elchanan Rushinek, Vice President of Engineering at Mobileye. “Moreover, the data protection in the FlexNoC Resilience Package allows us to more easily implement functional safety features in hardware to meet the most stringent ISO 26262 requirements.”
Dream Chip Technologies
“Arteris IP’s interconnect solution is at the heart of our ADAS chip catering to imaging, LIDAR point cloud, and 3D radar algorithms,” said Dr.-Ing. Jens Benndorf, Managing Director and COO of Dream Chip Technologies, Germany's largest semiconductor design services firm.
Canaan Creative, an ASIC design house in China, has been using Arteris IP's interconnect solution for on-chip communications between multiple hardware accelerators to implement AI algorithms: “Custom processing elements are crucial in innovative SoC designs, and the interconnect solution from Arteris IP has allowed us to efficiently implement these hardware processing elements for running AI and machine learning algorithms,” said Mark Wu, VP of Technology at Canaan Creative.
About Arteris IP
Arteris IP provides network-on-chip (NoC) interconnect IP to accelerate system-on-chip (SoC) semiconductor assembly for a wide range of applications from automobiles to mobile phones, IoT, cameras, SSD controllers, and servers for customers such as Samsung, Huawei / HiSilicon, Mobileye (Intel), Altera (Intel), and Texas Instruments. Arteris IP products include the Ncore cache coherent and FlexNoC non-coherent interconnect IP, the CodaCache standalone last level cache, as well as optional Resilience Package (ISO 26262 functional safety) and PIANO automated timing closure capabilities. Customer results obtained by using the Arteris IP product line include lower power, higher performance, more efficient design reuse and faster SoC development, leading to lower development and production costs. For more information, visit www.arteris.com or find us on LinkedIn at https://www.linkedin.com/company/arteris.