Attopsemi Technology Provided a Talk Along with an AIoT Panel at the 6th FD-SOI Forum in Shanghai

Hsinchu, Taiwan – October 1, 2018– Attopsemi Technology provided a talk along with an AIoT Panel in a FD-SOI Forum on September 18 in Shanghai, China. Leading companies worldwide have been meeting again for the sixth time in this FD-SOI Forum which attracted several hundred key attendees.

In the well-received speech during the AIoT Session, Shine Chung, Chairman of Attopsemi, provided a talk “I-fuse™ for FD-SOI: Ultra-high Reliability and Ultra-Low Power OTP.” I-fuse™ is a revolutionary “non-breaking” fuse technology, instead of the conventional “breaking” eFuse. If a fuse is programmed below a critical point, break point, all fuses show similar I-V characteristics and the program behavior can be model precisely by physics: heat generation, heat dissipation, and electromigration. “High reliability and high quality is guaranteed by physics not engineering. Other than requiring significantly much lower voltage and current to program than eFuse,” noted Chairman of Attopsemi Shine Chung, “I-fuse™ can achieve high quality and high reliability that no any other OTP could achieve”

Based on 22nm FD-SOI, I-fuse™ memory has been qualified by High Temperature Storage (HTS) test at 250°C for 1,000 hours in tens of million bits without any defects. Moreover, I-fuse™ resistance, before and after program, showed no visible changes even after this severe stress condition. In one project, I-fuse™ can be read with 0.4V and 1uA for battery-less IoT applications. In another project I-fuse™ was built as basic cells in standard cell library ensuring any low-bit-count OTP be synthesized by writing RTL code and followed by automated P&R tools. Building OTP in standard cell library allows tuning local variations, such as FBB/RBB voltages or SRAM wordline pulse, in each functional block to optimize performance versus power. Furthermore, any OTP key built in random logic can be more secure than in OTP memory. “If I-fuse™ look like a logic device, smell like a logic device, and work like a logic device, it IS a logic device that does not need to be qualified as a non-volatile device. When a logic process is qualified by SRAM as test vehicle, I-fuse™ is qualified,” stated by Shine Chung. I-fuse™ is also very suitable for CMOS generations 14nm and beyond because the supply voltage is getting lower but the gate oxide just can’t be scaled so that oxide rupture voltage can’t be reduced. Current programming will prevail over program programming. And “non-breaking” I-fuse™ will prevail over “breaking” eFuse. More detailed information will be announced in joint press releases and published in IEEE conference soon.

In the follow-on panel discussion, device mismatches and local variations were discussed as potential hazard of continuous device scaling. I-fuse™ can be used to trim device variations efficiently without any additional costs for chip ID, security key, date code, device parameter, MCU code, configuration data, memory repair, or product features selection for AI and IoT applications.

Shine Chung, Chairman of Attopsemi (the second speaker of the left) was attending an AloT Panel at the 6th FD-SOI Forum in Shanghai.

For more information, please visit Attopsemi website

http://www.attopsemi.com/?page_id=16

http://soiconsortium.eu/events/18-19-september-2018-shanghai-fd-soi-forum-international-rf-soi-workshop/

About Attopsemi Technology

Founded in 2010, Attopsemi Technology is dedicated to developing and licensing fuse-based One-Time Programmable (OTP) IP to all CMOS process technologies from 0.7um to 7nm and beyond in various silicided polysilicon, HKMG, FDSOI and FinFET technologies. Attopsemi provides the best possible OTP solutions for all merits in small size, low voltage/current programming/read, high quality, high reliability, low power, high speed, wide temperature and high data security. Attopsemi's proprietary I-fuse™ OTP technologies have been proven in numerous CMOS technologies and in several silicon foundries.