SAN JOSE, Calif. -- 03 Oct 2018 -- Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced the expansion of the Cadence® Cloud portfolio by providing customers with secure access to TSMC’s new Open Innovation Platform Virtual Design Environment (OIP VDE) to speed system-on-chip (SoC) design. Customers using the tapeout-proven Cadence Cloud-Hosted Design Solution on Microsoft Azure or Amazon Web Services (AWS) can efficiently utilize Cadence tools and flows and TSMC design collateral. Following hands-on testing in multiple geographies and in Microsoft Azure and AWS environments, TSMC certified the Cadence Cloud-Hosted Design Solution for use with OIP VDE engagements and selected Cadence as an OIP Cloud Alliance inaugural member.
The Cadence Cloud-Hosted Design Solution, part of the broader Cadence Cloud portfolio, is a managed, EDA-optimized cloud environment built on Microsoft Azure or AWS that supports customers’ peak needs or entire design environments. Cadence holds a Microsoft Partner designation and is an Advanced Technology Partner in the AWS Partner Network (APN) and has achieved AWS Industrial Software Competency status. By aligning the TSMC OIP VDE with the Cadence Cloud-Hosted Design Solution, mutual customers benefit from improved productivity, scalability, security and flexibility through scalable compute resources available in minutes or hours instead of months or weeks, achieving better overall throughput in the development process. For more information on the Cadence Cloud-Hosted Design Solution, please visit www.cadence.com/go/cchdsvde.
“TSMC envisions the OIP VDE as a vehicle for both full IC design projects and as a support environment to resolve specific design challenges,” said Suk Lee, TSMC senior director, Design Infrastructure Marketing Division at TSMC. “After extensive testing, internal pilots, and a customer tapeout, we chose Cadence as an OIP VDE Storefront and have certified the Cadence Cloud-Hosted Design Solution, which runs on Microsoft Azure and AWS, for cloud-based ASIC development using the OIP VDE at all nodes.”
“Microsoft, TSMC, and Cadence collaborated to enable SiFive to tape out a full SoC design using the TSMC’s new Open Innovation Platform Virtual Design Environment, which was delivered through the Cadence Cloud-Hosted Design Solution running on the Microsoft Azure cloud platform,” said Kushagra Vaid, GM and distinguished engineer, Azure Hardware Infrastructure, Microsoft Corp. “The collaboration demonstrates that OIP VDE on Azure can support multi-company, multi-region design teams with the robust security, massive scalability, and use-model flexibility that is essential for semiconductor industry success.”
“Cadence is driving cloud adoption with our industry-leading portfolio of offerings that enable customers to optimize peak compute workloads, completely offload CAD and infrastructure support or develop their own cloud deployment solutions,” said Dr. Anirudh Devgan, president of Cadence. “Working with TSMC, Microsoft Azure, and AWS to deliver TSMC’s OIP VDE provides our mutual customers with an efficient way to work across teams and regions on SoC design projects, speeding their time-to-market.”
Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and semiconductor IP are used by customers to deliver products to market faster. The company’s System Design Enablement strategy helps customers develop differentiated products—from chips to boards to systems—in mobile, consumer, cloud datacenter, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For. Learn more at www.cadence.com.