By Dylan McGrath, EETimes
October 31, 2018
SAN FRANCISCO — As artificial intelligence (AI) capability moves from the cloud to edge, it is inevitable that chipmakers will find ways to implement AI functions like neural-network processing and voice recognition in smaller, more efficient, and cost-effective devices.
The big, expensive AI accelerators that perform tasks back in the data center aren’t going to cut it for edge node devices. Battle lines are being drawn among various devices — including CPUs, GPUs, FPGAs, DSPs, and even microcontrollers — to implement AI at the edge with the required footprint, price point, and power efficiency for given applications.
To that end, a pair of intriguing architectures created specifically for implementing AI at the edge are being introduced at the Linley Processor Conference on Tuesday by Cadence Design Systems and Flex Logix Technologies. Both focus on bringing AI functionality into edge node devices with an emphasis on reducing the memory footprint.
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